ARM: use clockevents_config_and_register() where possible
The clockevent core is able to figure out the best mult and shift, calculate min_delta_ns and max_delta_ns, with the necessary info passed into clockevents_config_and_register(). Use this combined configure and register function where possible to make the codes less error prone and gain some positive diff stat. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Anton Vorontsov <cbouatmailru@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Tested-by: Roland Stigge <stigge@antcom.de> Acked-by: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: David Brown <davidb@codeaurora.org> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Barry Song <baohua.song@csr.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Cc: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jason Cooper <jason@lakedaemon.net> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
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@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
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static struct clock_event_device clockevent_gpt = {
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.name = "gp_timer",
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.rating = 300,
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.set_next_event = omap2_gp_timer_set_next_event,
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.set_mode = omap2_gp_timer_set_mode,
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@@ -340,17 +339,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
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__omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
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clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
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clockevent_gpt.shift);
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clockevent_gpt.max_delta_ns =
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clockevent_delta2ns(0xffffffff, &clockevent_gpt);
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clockevent_gpt.min_delta_ns =
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clockevent_delta2ns(3, &clockevent_gpt);
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/* Timer internal resynch latency. */
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clockevent_gpt.cpumask = cpu_possible_mask;
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clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
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clockevents_register_device(&clockevent_gpt);
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clockevents_config_and_register(&clockevent_gpt, clkev.rate,
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3, /* Timer internal resynch latency */
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0xffffffff);
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pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
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gptimer_id, clkev.rate);
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