ARM: sa1100: move StrongARM CPU ID checks to cputype.h
Move the StrongARM CPU ID checks out of the platform's hardware.h file into asm/cputype.h Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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@@ -60,6 +60,7 @@
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((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
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#define ARM_CPU_IMP_ARM 0x41
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#define ARM_CPU_IMP_DEC 0x44
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#define ARM_CPU_IMP_INTEL 0x69
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/* ARM implemented processors */
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@@ -76,6 +77,17 @@
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#define ARM_CPU_PART_CORTEX_A15 0x4100c0f0
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#define ARM_CPU_PART_MASK 0xff00fff0
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/* DEC implemented cores */
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#define ARM_CPU_PART_SA1100 0x4400a110
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/* Intel implemented cores */
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#define ARM_CPU_PART_SA1110 0x6900b110
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#define ARM_CPU_REV_SA1110_A0 0
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#define ARM_CPU_REV_SA1110_B0 4
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#define ARM_CPU_REV_SA1110_B1 5
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#define ARM_CPU_REV_SA1110_B2 6
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#define ARM_CPU_REV_SA1110_B4 8
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#define ARM_CPU_XSCALE_ARCH_MASK 0xe000
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#define ARM_CPU_XSCALE_ARCH_V1 0x2000
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#define ARM_CPU_XSCALE_ARCH_V2 0x4000
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@@ -173,6 +185,11 @@ static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
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return (read_cpuid_id() & 0xFF000000) >> 24;
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}
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static inline unsigned int __attribute_const__ read_cpuid_revision(void)
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{
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return read_cpuid_id() & 0x0000000f;
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}
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/*
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* The CPU part number is meaningless without referring to the CPU
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* implementer: implementers are free to define their own part numbers
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@@ -208,6 +225,10 @@ static inline unsigned int __attribute_const__ read_cpuid_mpidr(void)
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return read_cpuid(CPUID_MPIDR);
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}
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/* StrongARM-11x0 CPUs */
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#define cpu_is_sa1100() (read_cpuid_part() == ARM_CPU_PART_SA1100)
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#define cpu_is_sa1110() (read_cpuid_part() == ARM_CPU_PART_SA1110)
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/*
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* Intel's XScale3 core supports some v6 features (supersections, L2)
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* but advertises itself as v5 as it does not support the v6 ISA. For
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