usb: phy: msm: Add device tree support and binding information
Allows controller to be specified via device tree. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Ivan T. Ivanov
committed by
Felipe Balbi
Felipe Balbi
parent
f60c114a3a
commit
8364f9af23
@@ -30,9 +30,12 @@
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <linux/pm_runtime.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/usb.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/of.h>
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#include <linux/usb/ulpi.h>
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#include <linux/usb/gadget.h>
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#include <linux/usb/hcd.h>
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@@ -217,16 +220,16 @@ static struct usb_phy_io_ops msm_otg_io_ops = {
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static void ulpi_init(struct msm_otg *motg)
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{
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struct msm_otg_platform_data *pdata = motg->pdata;
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int *seq = pdata->phy_init_seq;
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int *seq = pdata->phy_init_seq, idx;
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u32 addr = ULPI_EXT_VENDOR_SPECIFIC;
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if (!seq)
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return;
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for (idx = 0; idx < pdata->phy_init_sz; idx++) {
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if (seq[idx] == -1)
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continue;
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while (seq[0] >= 0) {
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dev_vdbg(motg->phy.dev, "ulpi: write 0x%02x to 0x%02x\n",
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seq[0], seq[1]);
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ulpi_write(&motg->phy, seq[0], seq[1]);
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seq += 2;
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seq[idx], addr + idx);
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ulpi_write(&motg->phy, seq[idx], addr + idx);
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}
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}
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@@ -1343,26 +1346,96 @@ static void msm_otg_debugfs_cleanup(void)
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debugfs_remove(msm_otg_dbg_root);
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}
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static struct of_device_id msm_otg_dt_match[] = {
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{
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.compatible = "qcom,usb-otg-ci",
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.data = (void *) CI_45NM_INTEGRATED_PHY
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},
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{
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.compatible = "qcom,usb-otg-snps",
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.data = (void *) SNPS_28NM_INTEGRATED_PHY
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},
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{ }
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};
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MODULE_DEVICE_TABLE(of, msm_otg_dt_match);
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static int msm_otg_read_dt(struct platform_device *pdev, struct msm_otg *motg)
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{
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struct msm_otg_platform_data *pdata;
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const struct of_device_id *id;
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struct device_node *node = pdev->dev.of_node;
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struct property *prop;
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int len, ret, words;
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u32 val;
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pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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motg->pdata = pdata;
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id = of_match_device(msm_otg_dt_match, &pdev->dev);
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pdata->phy_type = (int) id->data;
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pdata->mode = of_usb_get_dr_mode(node);
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if (pdata->mode == USB_DR_MODE_UNKNOWN)
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pdata->mode = USB_DR_MODE_OTG;
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pdata->otg_control = OTG_PHY_CONTROL;
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if (!of_property_read_u32(node, "qcom,otg-control", &val))
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if (val == OTG_PMIC_CONTROL)
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pdata->otg_control = val;
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prop = of_find_property(node, "qcom,phy-init-sequence", &len);
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if (!prop || !len)
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return 0;
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words = len / sizeof(u32);
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if (words >= ULPI_EXT_VENDOR_SPECIFIC) {
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dev_warn(&pdev->dev, "Too big PHY init sequence %d\n", words);
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return 0;
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}
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pdata->phy_init_seq = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
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if (!pdata->phy_init_seq) {
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dev_warn(&pdev->dev, "No space for PHY init sequence\n");
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return 0;
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}
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ret = of_property_read_u32_array(node, "qcom,phy-init-sequence",
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pdata->phy_init_seq, words);
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if (!ret)
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pdata->phy_init_sz = words;
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return 0;
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}
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static int msm_otg_probe(struct platform_device *pdev)
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{
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struct regulator_bulk_data regs[3];
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int ret = 0;
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struct device_node *np = pdev->dev.of_node;
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struct msm_otg_platform_data *pdata;
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struct resource *res;
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struct msm_otg *motg;
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struct usb_phy *phy;
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dev_info(&pdev->dev, "msm_otg probe\n");
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if (!dev_get_platdata(&pdev->dev)) {
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dev_err(&pdev->dev, "No platform data given. Bailing out\n");
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return -ENODEV;
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}
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motg = devm_kzalloc(&pdev->dev, sizeof(struct msm_otg), GFP_KERNEL);
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if (!motg) {
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dev_err(&pdev->dev, "unable to allocate msm_otg\n");
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return -ENOMEM;
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}
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pdata = dev_get_platdata(&pdev->dev);
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if (!pdata) {
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if (!np)
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return -ENXIO;
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ret = msm_otg_read_dt(pdev, motg);
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if (ret)
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return ret;
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}
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motg->phy.otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg),
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GFP_KERNEL);
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if (!motg->phy.otg) {
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@@ -1370,17 +1443,17 @@ static int msm_otg_probe(struct platform_device *pdev)
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return -ENOMEM;
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}
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motg->pdata = dev_get_platdata(&pdev->dev);
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phy = &motg->phy;
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phy->dev = &pdev->dev;
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motg->phy_reset_clk = devm_clk_get(&pdev->dev, "usb_phy_clk");
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motg->phy_reset_clk = devm_clk_get(&pdev->dev,
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np ? "phy" : "usb_phy_clk");
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if (IS_ERR(motg->phy_reset_clk)) {
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dev_err(&pdev->dev, "failed to get usb_phy_clk\n");
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return PTR_ERR(motg->phy_reset_clk);
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}
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motg->clk = devm_clk_get(&pdev->dev, "usb_hs_clk");
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motg->clk = devm_clk_get(&pdev->dev, np ? "core" : "usb_hs_clk");
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if (IS_ERR(motg->clk)) {
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dev_err(&pdev->dev, "failed to get usb_hs_clk\n");
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return PTR_ERR(motg->clk);
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@@ -1392,7 +1465,7 @@ static int msm_otg_probe(struct platform_device *pdev)
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* operation and USB core cannot tolerate frequency changes on
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* CORE CLK.
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*/
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motg->pclk = devm_clk_get(&pdev->dev, "usb_hs_pclk");
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motg->pclk = devm_clk_get(&pdev->dev, np ? "iface" : "usb_hs_pclk");
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if (IS_ERR(motg->pclk)) {
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dev_err(&pdev->dev, "failed to get usb_hs_pclk\n");
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return PTR_ERR(motg->pclk);
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@@ -1403,7 +1476,8 @@ static int msm_otg_probe(struct platform_device *pdev)
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* clock is introduced to remove the dependency on AXI
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* bus frequency.
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*/
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motg->core_clk = devm_clk_get(&pdev->dev, "usb_hs_core_clk");
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motg->core_clk = devm_clk_get(&pdev->dev,
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np ? "alt_core" : "usb_hs_core_clk");
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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motg->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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@@ -1486,7 +1560,7 @@ static int msm_otg_probe(struct platform_device *pdev)
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device_init_wakeup(&pdev->dev, 1);
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if (motg->pdata->mode == USB_DR_MODE_OTG &&
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motg->pdata->otg_control == OTG_USER_CONTROL) {
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motg->pdata->otg_control == OTG_USER_CONTROL) {
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ret = msm_otg_debugfs_init(motg);
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if (ret)
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dev_dbg(&pdev->dev, "Can not create mode change file\n");
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@@ -1639,6 +1713,7 @@ static struct platform_driver msm_otg_driver = {
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.name = DRIVER_NAME,
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.owner = THIS_MODULE,
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.pm = &msm_otg_dev_pm_ops,
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.of_match_table = msm_otg_dt_match,
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},
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};
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