ARM: OMAP4: clock: add support for determine_rate for omap4 regm4xen DPLL
Similarly to OMAP3 noncore DPLL, the implementation of this DPLL clock type is wrong. This patch adds basic functionality for determine_rate for this clock type which will be taken into use in the patches following later. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley

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83501ff0a5
@@ -270,6 +270,10 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
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long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw,
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unsigned long target_rate,
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unsigned long *parent_rate);
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long omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw,
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unsigned long rate,
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unsigned long *best_parent_rate,
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struct clk **best_parent_clk);
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u8 omap2_init_dpll_parent(struct clk_hw *hw);
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unsigned long omap3_dpll_recalc(struct clk_hw *hw, unsigned long parent_rate);
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long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
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