xiaomi-sm8450/android_kernel_xiaomi_sm8450
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omap4: mmc driver support on OMAP4

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Add basic support for all 5 MMC controllers on OMAP4.

This patch doesn't include mmc-regulator support

Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Cc: Jarkko Lavinen <jarkko.lavinen@nokia.com>
Acked-by: Madhusudhan Chikkature <madhu.cr@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Cc: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Este commit está contenido en:
kishore kadiyala
2009-09-22 16:45:25 -07:00
cometido por Linus Torvalds
padre c99436fb75
commit 82cf818d54
Se han modificado 5 ficheros con 60 adiciones y 9 borrados
Descargar archivo de parche Descargar archivo de diferencias Expandir todos los archivos Contraer todos los archivos

2
arch/arm/plat-omap/include/mach/irqs.h
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@@ -503,6 +503,7 @@
#define INT_44XX_FPKA_READY_IRQ (50 + IRQ_GIC_START)
#define INT_44XX_SHA1MD51_IRQ (51 + IRQ_GIC_START)
#define INT_44XX_RNG_IRQ (52 + IRQ_GIC_START)
#define INT_44XX_MMC5_IRQ (59 + IRQ_GIC_START)
#define INT_44XX_I2C3_IRQ (61 + IRQ_GIC_START)
#define INT_44XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START)
#define INT_44XX_PBIAS_IRQ (75 + IRQ_GIC_START)
@@ -511,6 +512,7 @@
#define INT_44XX_TLL_IRQ (78 + IRQ_GIC_START)
#define INT_44XX_PARTHASH_IRQ (79 + IRQ_GIC_START)
#define INT_44XX_MMC3_IRQ (94 + IRQ_GIC_START)
#define INT_44XX_MMC4_IRQ (96 + IRQ_GIC_START)
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and

9
arch/arm/plat-omap/include/mach/mmc.h
Ver fichero

@@ -25,11 +25,18 @@
#define OMAP24XX_NR_MMC 2
#define OMAP34XX_NR_MMC 3
#define OMAP44XX_NR_MMC 5
#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
#define HSMMC_SIZE 0x200
#define OMAP3_HSMMC_SIZE 0x200
#define OMAP4_HSMMC_SIZE 0x1000
#define OMAP2_MMC1_BASE 0x4809c000
#define OMAP2_MMC2_BASE 0x480b4000
#define OMAP3_MMC3_BASE 0x480ad000
#define OMAP4_MMC4_BASE 0x480d1000
#define OMAP4_MMC5_BASE 0x480d5000
#define OMAP4_MMC_REG_OFFSET 0x100
#define HSMMC5 (1 << 4)
#define HSMMC4 (1 << 3)
#define HSMMC3 (1 << 2)
#define HSMMC2 (1 << 1)
#define HSMMC1 (1 << 0)