Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: - three fixes for 3.15 that didn't make it in time - limited Octeon 3 support. - paravirtualization support - improvment to platform support for Netlogix SOCs. - add support for powering down the Malta eval board in software - add many instructions to the in-kernel microassembler. - add support for the BPF JIT. - minor cleanups of the BCM47xx code. - large cleanup of math emu code resulting in significant code size reduction, better readability of the code and more accurate emulation. - improvments to the MIPS CPS code. - support C3 power status for the R4k count/compare clock device. - improvments to the GIO support for older SGI workstations. - increase number of supported CPUs to 256; this can be reached on certain embedded multithreaded ccNUMA configurations. - various small cleanups, updates and fixes * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (173 commits) MIPS: IP22/IP28: Improve GIO support MIPS: Octeon: Add twsi interrupt initialization for OCTEON 3XXX, 5XXX, 63XX DEC: Document the R4k MB ASIC mini interrupt controller DEC: Add self as the maintainer MIPS: Add microMIPS MSA support. MIPS: Replace calls to obsolete strict_strto call with kstrto* equivalents. MIPS: Replace obsolete strict_strto call with kstrto MIPS: BFP: Simplify code slightly. MIPS: Call find_vma with the mmap_sem held MIPS: Fix 'write_msa_##' inline macro. MIPS: Fix MSA toolchain support detection. mips: Update the email address of Geert Uytterhoeven MIPS: Add minimal defconfig for mips_paravirt MIPS: Enable build for new system 'paravirt' MIPS: paravirt: Add pci controller for virtio MIPS: Add code for new system 'paravirt' MIPS: Add functions for hypervisor call MIPS: OCTEON: Add OCTEON3 to __get_cpu_type MIPS: Add function get_ebase_cpunum MIPS: Add minimal support for OCTEON3 to c-r4k.c ...
This commit is contained in:
@@ -4,6 +4,7 @@ include include/uapi/asm-generic/Kbuild.asm
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generic-y += auxvec.h
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generic-y += ipcbuf.h
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header-y += bitfield.h
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header-y += bitsperlong.h
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header-y += break.h
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header-y += byteorder.h
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29
arch/mips/include/uapi/asm/bitfield.h
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29
arch/mips/include/uapi/asm/bitfield.h
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@@ -0,0 +1,29 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2014 by Ralf Baechle <ralf@linux-mips.org>
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*/
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#ifndef __UAPI_ASM_BITFIELD_H
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#define __UAPI_ASM_BITFIELD_H
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/*
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* * Damn ... bitfields depend from byteorder :-(
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* */
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#ifdef __MIPSEB__
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#define __BITFIELD_FIELD(field, more) \
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field; \
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more
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#elif defined(__MIPSEL__)
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#define __BITFIELD_FIELD(field, more) \
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more \
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field;
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#else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */
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#error "MIPS but neither __MIPSEL__ nor __MIPSEB__?"
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#endif
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#endif /* __UAPI_ASM_BITFIELD_H */
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@@ -13,6 +13,8 @@
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#ifndef _UAPI_ASM_INST_H
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#define _UAPI_ASM_INST_H
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#include <asm/bitfield.h>
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/*
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* Major opcodes; before MIPS IV cop1x was called cop3.
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*/
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@@ -74,16 +76,17 @@ enum spec2_op {
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enum spec3_op {
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ext_op, dextm_op, dextu_op, dext_op,
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ins_op, dinsm_op, dinsu_op, dins_op,
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lx_op = 0x0a, lwle_op = 0x19,
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lwre_op = 0x1a, cachee_op = 0x1b,
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sbe_op = 0x1c, she_op = 0x1d,
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sce_op = 0x1e, swe_op = 0x1f,
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bshfl_op = 0x20, swle_op = 0x21,
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swre_op = 0x22, prefe_op = 0x23,
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dbshfl_op = 0x24, lbue_op = 0x28,
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lhue_op = 0x29, lbe_op = 0x2c,
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lhe_op = 0x2d, lle_op = 0x2e,
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lwe_op = 0x2f, rdhwr_op = 0x3b
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yield_op = 0x09, lx_op = 0x0a,
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lwle_op = 0x19, lwre_op = 0x1a,
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cachee_op = 0x1b, sbe_op = 0x1c,
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she_op = 0x1d, sce_op = 0x1e,
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swe_op = 0x1f, bshfl_op = 0x20,
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swle_op = 0x21, swre_op = 0x22,
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prefe_op = 0x23, dbshfl_op = 0x24,
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lbue_op = 0x28, lhue_op = 0x29,
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lbe_op = 0x2c, lhe_op = 0x2d,
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lle_op = 0x2e, lwe_op = 0x2f,
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rdhwr_op = 0x3b
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};
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/*
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@@ -125,7 +128,8 @@ enum bcop_op {
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enum cop0_coi_func {
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tlbr_op = 0x01, tlbwi_op = 0x02,
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tlbwr_op = 0x06, tlbp_op = 0x08,
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rfe_op = 0x10, eret_op = 0x18
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rfe_op = 0x10, eret_op = 0x18,
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wait_op = 0x20,
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};
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/*
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@@ -201,6 +205,16 @@ enum lx_func {
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lbx_op = 0x16,
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};
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/*
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* BSHFL opcodes
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*/
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enum bshfl_func {
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wsbh_op = 0x2,
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dshd_op = 0x5,
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seb_op = 0x10,
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seh_op = 0x18,
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};
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/*
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* (microMIPS) Major opcodes.
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*/
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@@ -244,17 +258,22 @@ enum mm_32i_minor_op {
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enum mm_32a_minor_op {
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mm_sll32_op = 0x000,
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mm_ins_op = 0x00c,
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mm_sllv32_op = 0x010,
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mm_ext_op = 0x02c,
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mm_pool32axf_op = 0x03c,
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mm_srl32_op = 0x040,
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mm_sra_op = 0x080,
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mm_srlv32_op = 0x090,
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mm_rotr_op = 0x0c0,
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mm_lwxs_op = 0x118,
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mm_addu32_op = 0x150,
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mm_subu32_op = 0x1d0,
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mm_wsbh_op = 0x1ec,
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mm_mul_op = 0x210,
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mm_and_op = 0x250,
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mm_or32_op = 0x290,
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mm_xor32_op = 0x310,
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mm_sltu_op = 0x390,
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};
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/*
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@@ -294,15 +313,20 @@ enum mm_32axf_minor_op {
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mm_mfc0_op = 0x003,
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mm_mtc0_op = 0x00b,
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mm_tlbp_op = 0x00d,
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mm_mfhi32_op = 0x035,
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mm_jalr_op = 0x03c,
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mm_tlbr_op = 0x04d,
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mm_mflo32_op = 0x075,
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mm_jalrhb_op = 0x07c,
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mm_tlbwi_op = 0x08d,
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mm_tlbwr_op = 0x0cd,
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mm_jalrs_op = 0x13c,
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mm_jalrshb_op = 0x17c,
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mm_sync_op = 0x1ad,
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mm_syscall_op = 0x22d,
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mm_wait_op = 0x24d,
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mm_eret_op = 0x3cd,
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mm_divu_op = 0x5dc,
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};
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/*
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@@ -480,24 +504,6 @@ enum MIPS6e_i8_func {
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*/
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#define MM_NOP16 0x0c00
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/*
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* Damn ... bitfields depend from byteorder :-(
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*/
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#ifdef __MIPSEB__
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#define __BITFIELD_FIELD(field, more) \
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field; \
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more
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#elif defined(__MIPSEL__)
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#define __BITFIELD_FIELD(field, more) \
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more \
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field;
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#else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */
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#error "MIPS but neither __MIPSEL__ nor __MIPSEB__?"
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#endif
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struct j_format {
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__BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
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__BITFIELD_FIELD(unsigned int target : 26,
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@@ -1 +1,5 @@
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#include <asm-generic/kvm_para.h>
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#ifndef _UAPI_ASM_MIPS_KVM_PARA_H
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#define _UAPI_ASM_MIPS_KVM_PARA_H
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#endif /* _UAPI_ASM_MIPS_KVM_PARA_H */
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@@ -14,9 +14,12 @@
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/*
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* We don't use int-l64.h for the kernel anymore but still use it for
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* userspace to avoid code changes.
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*
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* However, some user programs (e.g. perf) may not want this. They can
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* flag __SANE_USERSPACE_TYPES__ to get int-ll64.h here.
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*/
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#ifndef __KERNEL__
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# if _MIPS_SZLONG == 64
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# if _MIPS_SZLONG == 64 && !defined(__SANE_USERSPACE_TYPES__)
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# include <asm-generic/int-l64.h>
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# else
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# include <asm-generic/int-ll64.h>
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