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drm/amd/powerplay: support retrieving and adjusting fclock power levels V2

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User can use "pp_dpm_fclk" to retrieve and adjust fclock power
levels.

V2: expose this interface for Vega20 and later ASICs only

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan
2019-01-14 15:44:44 +08:00
committed by Alex Deucher
parent d7337ca264
commit 828e37efe8
3 changed files with 116 additions and 2 deletions
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1
drivers/gpu/drm/amd/include/kgd_pp_interface.h
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@@ -93,6 +93,7 @@ enum pp_clock_type {
PP_MCLK,
PP_PCIE,
PP_SOCCLK,
PP_FCLK,
OD_SCLK,
OD_MCLK,
OD_VDDC_CURVE,