Merge branch 'linus' into sched/urgent, to resolve conflicts
Conflicts: arch/arm64/kernel/entry.S arch/x86/Kconfig include/linux/sched/mm.h kernel/fork.c Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar
@@ -28,6 +28,8 @@
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#include <asm/errno.h>
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#include <asm/esr.h>
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#include <asm/irq.h>
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#include <asm/memory.h>
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#include <asm/mmu.h>
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#include <asm/processor.h>
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#include <asm/ptrace.h>
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#include <asm/thread_info.h>
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@@ -69,8 +71,21 @@
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#define BAD_FIQ 2
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#define BAD_ERROR 3
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.macro kernel_ventry label
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.macro kernel_ventry, el, label, regsize = 64
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.align 7
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
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alternative_if ARM64_UNMAP_KERNEL_AT_EL0
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.if \el == 0
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.if \regsize == 64
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mrs x30, tpidrro_el0
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msr tpidrro_el0, xzr
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.else
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mov x30, xzr
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.endif
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.endif
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alternative_else_nop_endif
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#endif
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sub sp, sp, #S_FRAME_SIZE
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#ifdef CONFIG_VMAP_STACK
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/*
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@@ -82,7 +97,7 @@
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tbnz x0, #THREAD_SHIFT, 0f
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sub x0, sp, x0 // x0'' = sp' - x0' = (sp + x0) - sp = x0
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sub sp, sp, x0 // sp'' = sp' - x0 = (sp + x0) - x0 = sp
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b \label
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b el\()\el\()_\label
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0:
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/*
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@@ -114,7 +129,12 @@
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sub sp, sp, x0
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mrs x0, tpidrro_el0
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#endif
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b \label
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b el\()\el\()_\label
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.endm
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.macro tramp_alias, dst, sym
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mov_q \dst, TRAMP_VALIAS
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add \dst, \dst, #(\sym - .entry.tramp.text)
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.endm
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.macro kernel_entry, el, regsize = 64
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@@ -185,7 +205,7 @@ alternative_else_nop_endif
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.if \el != 0
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mrs x21, ttbr0_el1
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tst x21, #0xffff << 48 // Check for the reserved ASID
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tst x21, #TTBR_ASID_MASK // Check for the reserved ASID
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orr x23, x23, #PSR_PAN_BIT // Set the emulated PAN in the saved SPSR
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b.eq 1f // TTBR0 access already disabled
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and x23, x23, #~PSR_PAN_BIT // Clear the emulated PAN in the saved SPSR
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@@ -248,7 +268,7 @@ alternative_else_nop_endif
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tbnz x22, #22, 1f // Skip re-enabling TTBR0 access if the PSR_PAN_BIT is set
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.endif
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__uaccess_ttbr0_enable x0
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__uaccess_ttbr0_enable x0, x1
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.if \el == 0
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/*
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@@ -257,7 +277,7 @@ alternative_else_nop_endif
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* Cavium erratum 27456 (broadcast TLBI instructions may cause I-cache
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* corruption).
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*/
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post_ttbr0_update_workaround
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bl post_ttbr_update_workaround
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.endif
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1:
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.if \el != 0
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@@ -269,18 +289,20 @@ alternative_else_nop_endif
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.if \el == 0
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ldr x23, [sp, #S_SP] // load return stack pointer
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msr sp_el0, x23
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tst x22, #PSR_MODE32_BIT // native task?
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b.eq 3f
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#ifdef CONFIG_ARM64_ERRATUM_845719
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alternative_if ARM64_WORKAROUND_845719
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tbz x22, #4, 1f
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#ifdef CONFIG_PID_IN_CONTEXTIDR
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mrs x29, contextidr_el1
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msr contextidr_el1, x29
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#else
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msr contextidr_el1, xzr
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#endif
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1:
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alternative_else_nop_endif
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#endif
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3:
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.endif
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msr elr_el1, x21 // set up the return data
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@@ -306,7 +328,21 @@ alternative_else_nop_endif
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* ARCH_HAS_MEMBARRIER_SYNC_CORE rely on eret context synchronization
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* when returning from IPI handler, and when returning to user-space.
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*/
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eret // return to kernel
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.if \el == 0
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alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
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bne 4f
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msr far_el1, x30
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tramp_alias x30, tramp_exit_native
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br x30
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4:
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tramp_alias x30, tramp_exit_compat
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br x30
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#endif
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.else
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eret
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.endif
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.endm
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.macro irq_stack_entry
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@@ -371,31 +407,31 @@ tsk .req x28 // current thread_info
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.align 11
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ENTRY(vectors)
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kernel_ventry el1_sync_invalid // Synchronous EL1t
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kernel_ventry el1_irq_invalid // IRQ EL1t
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kernel_ventry el1_fiq_invalid // FIQ EL1t
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kernel_ventry el1_error_invalid // Error EL1t
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kernel_ventry 1, sync_invalid // Synchronous EL1t
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kernel_ventry 1, irq_invalid // IRQ EL1t
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kernel_ventry 1, fiq_invalid // FIQ EL1t
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kernel_ventry 1, error_invalid // Error EL1t
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kernel_ventry el1_sync // Synchronous EL1h
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kernel_ventry el1_irq // IRQ EL1h
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kernel_ventry el1_fiq_invalid // FIQ EL1h
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kernel_ventry el1_error // Error EL1h
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kernel_ventry 1, sync // Synchronous EL1h
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kernel_ventry 1, irq // IRQ EL1h
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kernel_ventry 1, fiq_invalid // FIQ EL1h
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kernel_ventry 1, error // Error EL1h
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kernel_ventry el0_sync // Synchronous 64-bit EL0
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kernel_ventry el0_irq // IRQ 64-bit EL0
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kernel_ventry el0_fiq_invalid // FIQ 64-bit EL0
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kernel_ventry el0_error // Error 64-bit EL0
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kernel_ventry 0, sync // Synchronous 64-bit EL0
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kernel_ventry 0, irq // IRQ 64-bit EL0
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kernel_ventry 0, fiq_invalid // FIQ 64-bit EL0
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kernel_ventry 0, error // Error 64-bit EL0
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#ifdef CONFIG_COMPAT
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kernel_ventry el0_sync_compat // Synchronous 32-bit EL0
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kernel_ventry el0_irq_compat // IRQ 32-bit EL0
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kernel_ventry el0_fiq_invalid_compat // FIQ 32-bit EL0
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kernel_ventry el0_error_compat // Error 32-bit EL0
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kernel_ventry 0, sync_compat, 32 // Synchronous 32-bit EL0
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kernel_ventry 0, irq_compat, 32 // IRQ 32-bit EL0
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kernel_ventry 0, fiq_invalid_compat, 32 // FIQ 32-bit EL0
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kernel_ventry 0, error_compat, 32 // Error 32-bit EL0
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#else
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kernel_ventry el0_sync_invalid // Synchronous 32-bit EL0
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kernel_ventry el0_irq_invalid // IRQ 32-bit EL0
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kernel_ventry el0_fiq_invalid // FIQ 32-bit EL0
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kernel_ventry el0_error_invalid // Error 32-bit EL0
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kernel_ventry 0, sync_invalid, 32 // Synchronous 32-bit EL0
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kernel_ventry 0, irq_invalid, 32 // IRQ 32-bit EL0
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kernel_ventry 0, fiq_invalid, 32 // FIQ 32-bit EL0
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kernel_ventry 0, error_invalid, 32 // Error 32-bit EL0
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#endif
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END(vectors)
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@@ -689,12 +725,15 @@ el0_ia:
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* Instruction abort handling
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*/
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mrs x26, far_el1
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enable_daif
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enable_da_f
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#ifdef CONFIG_TRACE_IRQFLAGS
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bl trace_hardirqs_off
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#endif
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ct_user_exit
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mov x0, x26
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mov x1, x25
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mov x2, sp
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bl do_mem_abort
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bl do_el0_ia_bp_hardening
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b ret_to_user
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el0_fpsimd_acc:
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/*
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@@ -947,6 +986,124 @@ __ni_sys_trace:
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.popsection // .entry.text
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
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/*
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* Exception vectors trampoline.
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*/
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.pushsection ".entry.tramp.text", "ax"
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.macro tramp_map_kernel, tmp
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mrs \tmp, ttbr1_el1
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add \tmp, \tmp, #(PAGE_SIZE + RESERVED_TTBR0_SIZE)
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bic \tmp, \tmp, #USER_ASID_FLAG
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msr ttbr1_el1, \tmp
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#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003
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alternative_if ARM64_WORKAROUND_QCOM_FALKOR_E1003
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/* ASID already in \tmp[63:48] */
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movk \tmp, #:abs_g2_nc:(TRAMP_VALIAS >> 12)
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movk \tmp, #:abs_g1_nc:(TRAMP_VALIAS >> 12)
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/* 2MB boundary containing the vectors, so we nobble the walk cache */
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movk \tmp, #:abs_g0_nc:((TRAMP_VALIAS & ~(SZ_2M - 1)) >> 12)
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isb
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tlbi vae1, \tmp
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dsb nsh
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alternative_else_nop_endif
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#endif /* CONFIG_QCOM_FALKOR_ERRATUM_1003 */
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.endm
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.macro tramp_unmap_kernel, tmp
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mrs \tmp, ttbr1_el1
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sub \tmp, \tmp, #(PAGE_SIZE + RESERVED_TTBR0_SIZE)
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orr \tmp, \tmp, #USER_ASID_FLAG
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msr ttbr1_el1, \tmp
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/*
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* We avoid running the post_ttbr_update_workaround here because the
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* user and kernel ASIDs don't have conflicting mappings, so any
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* "blessing" as described in:
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*
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* http://lkml.kernel.org/r/56BB848A.6060603@caviumnetworks.com
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*
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* will not hurt correctness. Whilst this may partially defeat the
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* point of using split ASIDs in the first place, it avoids
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* the hit of invalidating the entire I-cache on every return to
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* userspace.
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*/
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.endm
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.macro tramp_ventry, regsize = 64
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.align 7
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1:
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.if \regsize == 64
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msr tpidrro_el0, x30 // Restored in kernel_ventry
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.endif
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/*
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* Defend against branch aliasing attacks by pushing a dummy
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* entry onto the return stack and using a RET instruction to
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* enter the full-fat kernel vectors.
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*/
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bl 2f
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b .
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2:
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tramp_map_kernel x30
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#ifdef CONFIG_RANDOMIZE_BASE
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adr x30, tramp_vectors + PAGE_SIZE
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alternative_insn isb, nop, ARM64_WORKAROUND_QCOM_FALKOR_E1003
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ldr x30, [x30]
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#else
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ldr x30, =vectors
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#endif
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prfm plil1strm, [x30, #(1b - tramp_vectors)]
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msr vbar_el1, x30
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add x30, x30, #(1b - tramp_vectors)
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isb
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ret
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.endm
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.macro tramp_exit, regsize = 64
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adr x30, tramp_vectors
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msr vbar_el1, x30
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tramp_unmap_kernel x30
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.if \regsize == 64
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mrs x30, far_el1
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.endif
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eret
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.endm
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.align 11
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ENTRY(tramp_vectors)
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.space 0x400
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tramp_ventry
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tramp_ventry
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tramp_ventry
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tramp_ventry
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tramp_ventry 32
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tramp_ventry 32
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tramp_ventry 32
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tramp_ventry 32
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END(tramp_vectors)
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ENTRY(tramp_exit_native)
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tramp_exit
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END(tramp_exit_native)
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ENTRY(tramp_exit_compat)
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tramp_exit 32
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END(tramp_exit_compat)
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.ltorg
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.popsection // .entry.tramp.text
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#ifdef CONFIG_RANDOMIZE_BASE
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.pushsection ".rodata", "a"
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.align PAGE_SHIFT
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.globl __entry_tramp_data_start
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__entry_tramp_data_start:
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.quad vectors
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.popsection // .rodata
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#endif /* CONFIG_RANDOMIZE_BASE */
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#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
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/*
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* Special system call wrappers.
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*/
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@@ -1000,3 +1157,180 @@ ENTRY(ret_from_fork)
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b ret_to_user
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ENDPROC(ret_from_fork)
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NOKPROBE(ret_from_fork)
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#ifdef CONFIG_ARM_SDE_INTERFACE
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#include <asm/sdei.h>
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#include <uapi/linux/arm_sdei.h>
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.macro sdei_handler_exit exit_mode
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/* On success, this call never returns... */
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cmp \exit_mode, #SDEI_EXIT_SMC
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b.ne 99f
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smc #0
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b .
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99: hvc #0
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b .
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.endm
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
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/*
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* The regular SDEI entry point may have been unmapped along with the rest of
|
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* the kernel. This trampoline restores the kernel mapping to make the x1 memory
|
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* argument accessible.
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*
|
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* This clobbers x4, __sdei_handler() will restore this from firmware's
|
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* copy.
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*/
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.ltorg
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.pushsection ".entry.tramp.text", "ax"
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ENTRY(__sdei_asm_entry_trampoline)
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mrs x4, ttbr1_el1
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tbz x4, #USER_ASID_BIT, 1f
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tramp_map_kernel tmp=x4
|
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isb
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mov x4, xzr
|
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|
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/*
|
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* Use reg->interrupted_regs.addr_limit to remember whether to unmap
|
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* the kernel on exit.
|
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*/
|
||||
1: str x4, [x1, #(SDEI_EVENT_INTREGS + S_ORIG_ADDR_LIMIT)]
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#ifdef CONFIG_RANDOMIZE_BASE
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adr x4, tramp_vectors + PAGE_SIZE
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add x4, x4, #:lo12:__sdei_asm_trampoline_next_handler
|
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ldr x4, [x4]
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#else
|
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ldr x4, =__sdei_asm_handler
|
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#endif
|
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br x4
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||||
ENDPROC(__sdei_asm_entry_trampoline)
|
||||
NOKPROBE(__sdei_asm_entry_trampoline)
|
||||
|
||||
/*
|
||||
* Make the exit call and restore the original ttbr1_el1
|
||||
*
|
||||
* x0 & x1: setup for the exit API call
|
||||
* x2: exit_mode
|
||||
* x4: struct sdei_registered_event argument from registration time.
|
||||
*/
|
||||
ENTRY(__sdei_asm_exit_trampoline)
|
||||
ldr x4, [x4, #(SDEI_EVENT_INTREGS + S_ORIG_ADDR_LIMIT)]
|
||||
cbnz x4, 1f
|
||||
|
||||
tramp_unmap_kernel tmp=x4
|
||||
|
||||
1: sdei_handler_exit exit_mode=x2
|
||||
ENDPROC(__sdei_asm_exit_trampoline)
|
||||
NOKPROBE(__sdei_asm_exit_trampoline)
|
||||
.ltorg
|
||||
.popsection // .entry.tramp.text
|
||||
#ifdef CONFIG_RANDOMIZE_BASE
|
||||
.pushsection ".rodata", "a"
|
||||
__sdei_asm_trampoline_next_handler:
|
||||
.quad __sdei_asm_handler
|
||||
.popsection // .rodata
|
||||
#endif /* CONFIG_RANDOMIZE_BASE */
|
||||
#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
|
||||
|
||||
/*
|
||||
* Software Delegated Exception entry point.
|
||||
*
|
||||
* x0: Event number
|
||||
* x1: struct sdei_registered_event argument from registration time.
|
||||
* x2: interrupted PC
|
||||
* x3: interrupted PSTATE
|
||||
* x4: maybe clobbered by the trampoline
|
||||
*
|
||||
* Firmware has preserved x0->x17 for us, we must save/restore the rest to
|
||||
* follow SMC-CC. We save (or retrieve) all the registers as the handler may
|
||||
* want them.
|
||||
*/
|
||||
ENTRY(__sdei_asm_handler)
|
||||
stp x2, x3, [x1, #SDEI_EVENT_INTREGS + S_PC]
|
||||
stp x4, x5, [x1, #SDEI_EVENT_INTREGS + 16 * 2]
|
||||
stp x6, x7, [x1, #SDEI_EVENT_INTREGS + 16 * 3]
|
||||
stp x8, x9, [x1, #SDEI_EVENT_INTREGS + 16 * 4]
|
||||
stp x10, x11, [x1, #SDEI_EVENT_INTREGS + 16 * 5]
|
||||
stp x12, x13, [x1, #SDEI_EVENT_INTREGS + 16 * 6]
|
||||
stp x14, x15, [x1, #SDEI_EVENT_INTREGS + 16 * 7]
|
||||
stp x16, x17, [x1, #SDEI_EVENT_INTREGS + 16 * 8]
|
||||
stp x18, x19, [x1, #SDEI_EVENT_INTREGS + 16 * 9]
|
||||
stp x20, x21, [x1, #SDEI_EVENT_INTREGS + 16 * 10]
|
||||
stp x22, x23, [x1, #SDEI_EVENT_INTREGS + 16 * 11]
|
||||
stp x24, x25, [x1, #SDEI_EVENT_INTREGS + 16 * 12]
|
||||
stp x26, x27, [x1, #SDEI_EVENT_INTREGS + 16 * 13]
|
||||
stp x28, x29, [x1, #SDEI_EVENT_INTREGS + 16 * 14]
|
||||
mov x4, sp
|
||||
stp lr, x4, [x1, #SDEI_EVENT_INTREGS + S_LR]
|
||||
|
||||
mov x19, x1
|
||||
|
||||
#ifdef CONFIG_VMAP_STACK
|
||||
/*
|
||||
* entry.S may have been using sp as a scratch register, find whether
|
||||
* this is a normal or critical event and switch to the appropriate
|
||||
* stack for this CPU.
|
||||
*/
|
||||
ldrb w4, [x19, #SDEI_EVENT_PRIORITY]
|
||||
cbnz w4, 1f
|
||||
ldr_this_cpu dst=x5, sym=sdei_stack_normal_ptr, tmp=x6
|
||||
b 2f
|
||||
1: ldr_this_cpu dst=x5, sym=sdei_stack_critical_ptr, tmp=x6
|
||||
2: mov x6, #SDEI_STACK_SIZE
|
||||
add x5, x5, x6
|
||||
mov sp, x5
|
||||
#endif
|
||||
|
||||
/*
|
||||
* We may have interrupted userspace, or a guest, or exit-from or
|
||||
* return-to either of these. We can't trust sp_el0, restore it.
|
||||
*/
|
||||
mrs x28, sp_el0
|
||||
ldr_this_cpu dst=x0, sym=__entry_task, tmp=x1
|
||||
msr sp_el0, x0
|
||||
|
||||
/* If we interrupted the kernel point to the previous stack/frame. */
|
||||
and x0, x3, #0xc
|
||||
mrs x1, CurrentEL
|
||||
cmp x0, x1
|
||||
csel x29, x29, xzr, eq // fp, or zero
|
||||
csel x4, x2, xzr, eq // elr, or zero
|
||||
|
||||
stp x29, x4, [sp, #-16]!
|
||||
mov x29, sp
|
||||
|
||||
add x0, x19, #SDEI_EVENT_INTREGS
|
||||
mov x1, x19
|
||||
bl __sdei_handler
|
||||
|
||||
msr sp_el0, x28
|
||||
/* restore regs >x17 that we clobbered */
|
||||
mov x4, x19 // keep x4 for __sdei_asm_exit_trampoline
|
||||
ldp x28, x29, [x4, #SDEI_EVENT_INTREGS + 16 * 14]
|
||||
ldp x18, x19, [x4, #SDEI_EVENT_INTREGS + 16 * 9]
|
||||
ldp lr, x1, [x4, #SDEI_EVENT_INTREGS + S_LR]
|
||||
mov sp, x1
|
||||
|
||||
mov x1, x0 // address to complete_and_resume
|
||||
/* x0 = (x0 <= 1) ? EVENT_COMPLETE:EVENT_COMPLETE_AND_RESUME */
|
||||
cmp x0, #1
|
||||
mov_q x2, SDEI_1_0_FN_SDEI_EVENT_COMPLETE
|
||||
mov_q x3, SDEI_1_0_FN_SDEI_EVENT_COMPLETE_AND_RESUME
|
||||
csel x0, x2, x3, ls
|
||||
|
||||
ldr_l x2, sdei_exit_mode
|
||||
|
||||
alternative_if_not ARM64_UNMAP_KERNEL_AT_EL0
|
||||
sdei_handler_exit exit_mode=x2
|
||||
alternative_else_nop_endif
|
||||
|
||||
#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
|
||||
tramp_alias dst=x5, sym=__sdei_asm_exit_trampoline
|
||||
br x5
|
||||
#endif
|
||||
ENDPROC(__sdei_asm_handler)
|
||||
NOKPROBE(__sdei_asm_handler)
|
||||
#endif /* CONFIG_ARM_SDE_INTERFACE */
|
||||
|
||||
Reference in New Issue
Block a user