Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (29 commits) xen: unitialised return value in xenbus_write_transaction x86: fix section mismatch warning x86: unmask CPUID levels on Intel CPUs, fix x86: work around PAGE_KERNEL_WC not getting WC in iomap_atomic_prot_pfn. x86: use standard PIT frequency xen: handle highmem pages correctly when shrinking a domain x86, mm: fix pte_free() xen: actually release memory when shrinking domain x86: unmask CPUID levels on Intel CPUs x86: add MSR_IA32_MISC_ENABLE bits to <asm/msr-index.h> x86: fix PTE corruption issue while mapping RAM using /dev/mem x86: mtrr fix debug boot parameter x86: fix page attribute corruption with cpa() Revert "x86: signal: change type of paramter for sys_rt_sigreturn()" x86: use early clobbers in usercopy*.c x86: remove kernel_physical_mapping_init() from init section fix: crash: IP: __bitmap_intersects+0x48/0x73 cpufreq: use work_on_cpu in acpi-cpufreq.c for drv_read and drv_write work_on_cpu: Use our own workqueue. work_on_cpu: don't try to get_online_cpus() in work_on_cpu. ...
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@@ -333,11 +333,23 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
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req_type & _PAGE_CACHE_MASK);
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}
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is_range_ram = pagerange_is_ram(start, end);
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if (is_range_ram == 1)
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return reserve_ram_pages_type(start, end, req_type, new_type);
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else if (is_range_ram < 0)
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return -EINVAL;
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if (new_type)
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*new_type = actual_type;
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/*
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* For legacy reasons, some parts of the physical address range in the
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* legacy 1MB region is treated as non-RAM (even when listed as RAM in
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* the e820 tables). So we will track the memory attributes of this
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* legacy 1MB region using the linear memtype_list always.
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*/
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if (end >= ISA_END_ADDRESS) {
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is_range_ram = pagerange_is_ram(start, end);
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if (is_range_ram == 1)
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return reserve_ram_pages_type(start, end, req_type,
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new_type);
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else if (is_range_ram < 0)
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return -EINVAL;
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}
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new = kmalloc(sizeof(struct memtype), GFP_KERNEL);
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if (!new)
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@@ -347,9 +359,6 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
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new->end = end;
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new->type = actual_type;
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if (new_type)
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*new_type = actual_type;
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spin_lock(&memtype_lock);
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if (cached_entry && start >= cached_start)
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@@ -437,11 +446,19 @@ int free_memtype(u64 start, u64 end)
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if (is_ISA_range(start, end - 1))
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return 0;
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is_range_ram = pagerange_is_ram(start, end);
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if (is_range_ram == 1)
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return free_ram_pages_type(start, end);
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else if (is_range_ram < 0)
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return -EINVAL;
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/*
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* For legacy reasons, some parts of the physical address range in the
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* legacy 1MB region is treated as non-RAM (even when listed as RAM in
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* the e820 tables). So we will track the memory attributes of this
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* legacy 1MB region using the linear memtype_list always.
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*/
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if (end >= ISA_END_ADDRESS) {
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is_range_ram = pagerange_is_ram(start, end);
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if (is_range_ram == 1)
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return free_ram_pages_type(start, end);
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else if (is_range_ram < 0)
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return -EINVAL;
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}
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spin_lock(&memtype_lock);
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list_for_each_entry(entry, &memtype_list, nd) {
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