spi: tegra114: change format for spi_set_cs_timing()
function
The initial version of `spi_set_cs_timing()` was implemented with consideration only for clock-cycles as delay. For cases like `CS setup` time, it's sometimes needed that micro-seconds (or nano-seconds) are required, or sometimes even longer delays, for cases where the device needs a little longer to start transferring that after CS is asserted. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20190926105147.7839-15-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
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committed by
Mark Brown

parent
8e319dd5f1
commit
8105936684
@@ -723,15 +723,31 @@ static void tegra_spi_deinit_dma_param(struct tegra_spi_data *tspi,
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dma_release_channel(dma_chan);
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}
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static void tegra_spi_set_hw_cs_timing(struct spi_device *spi, u8 setup_dly,
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u8 hold_dly, u8 inactive_dly)
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static int tegra_spi_set_hw_cs_timing(struct spi_device *spi,
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struct spi_delay *setup,
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struct spi_delay *hold,
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struct spi_delay *inactive)
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{
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struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master);
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u8 setup_dly, hold_dly, inactive_dly;
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u32 setup_hold;
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u32 spi_cs_timing;
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u32 inactive_cycles;
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u8 cs_state;
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if ((setup && setup->unit != SPI_DELAY_UNIT_SCK) ||
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(hold && hold->unit != SPI_DELAY_UNIT_SCK) ||
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(inactive && inactive->unit != SPI_DELAY_UNIT_SCK)) {
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dev_err(&spi->dev,
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"Invalid delay unit %d, should be SPI_DELAY_UNIT_SCK\n",
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SPI_DELAY_UNIT_SCK);
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return -EINVAL;
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}
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setup_dly = setup ? setup->value : 0;
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hold_dly = hold ? hold->value : 0;
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inactive_dly = inactive ? inactive->value : 0;
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setup_dly = min_t(u8, setup_dly, MAX_SETUP_HOLD_CYCLES);
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hold_dly = min_t(u8, hold_dly, MAX_SETUP_HOLD_CYCLES);
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if (setup_dly && hold_dly) {
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@@ -758,6 +774,8 @@ static void tegra_spi_set_hw_cs_timing(struct spi_device *spi, u8 setup_dly,
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tspi->spi_cs_timing2 = spi_cs_timing;
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tegra_spi_writel(tspi, spi_cs_timing, SPI_CS_TIMING2);
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}
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return 0;
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}
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static u32 tegra_spi_setup_transfer_one(struct spi_device *spi,
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