clk: hi3798cv200: add COMBPHY0 clock support

The clock COMBPHY1 has already been supported by hi3798cv200 driver,
but COMBPHY0 is missing.  It adds COMBPHY0 clock support.

Since the mux table is being shared by COMBPHY0 and COMBPHY1, it renames
comphy1_mux_p and comphy1_mux_table a bit to drop instance number '1'
from there.

Signed-off-by: Jianguo Sun <sunjianguo1@huawei.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Jianguo Sun
2018-01-24 19:48:27 +08:00
committed by Shawn Guo
parent a44d1f531a
commit 80f8ce5895
2 changed files with 12 additions and 4 deletions

View File

@@ -61,6 +61,7 @@
#define HISTB_USB2_OTG_UTMI_CLK 39
#define HISTB_USB2_PHY1_REF_CLK 40
#define HISTB_USB2_PHY2_REF_CLK 41
#define HISTB_COMBPHY0_CLK 42
/* clocks provided by mcu CRG */
#define HISTB_MCE_CLK 1