i.MX27: Add ADS platform support
This patch adds basic support for the Freescale MX27ADS reference board. Currently only a serial console can be used. Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
This commit is contained in:
Juergen Beisert
304
arch/arm/mach-mx2/mx27ads.c
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304
arch/arm/mach-mx2/mx27ads.c
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/*
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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* Copyright (C) 2002 Shane Nay (shane@minirl.com)
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* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <asm/arch/common.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/imx-uart.h>
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#include <asm/arch/iomux-mx1-mx2.h>
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#include <asm/arch/board-mx27ads.h>
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/* ADS's NOR flash */
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static struct physmap_flash_data mx27ads_flash_data = {
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.width = 2,
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};
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static struct resource mx27ads_flash_resource = {
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.start = 0xc0000000,
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.end = 0xc0000000 + 0x02000000 - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device mx27ads_nor_mtd_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &mx27ads_flash_data,
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},
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.num_resources = 1,
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.resource = &mx27ads_flash_resource,
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};
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static int mxc_uart0_pins[] = {
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PE12_PF_UART1_TXD,
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PE13_PF_UART1_RXD,
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PE14_PF_UART1_CTS,
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PE15_PF_UART1_RTS
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};
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static int uart_mxc_port0_init(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
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ARRAY_SIZE(mxc_uart0_pins),
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MXC_GPIO_ALLOC_MODE_NORMAL, "UART0");
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}
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static int uart_mxc_port0_exit(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
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ARRAY_SIZE(mxc_uart0_pins),
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MXC_GPIO_ALLOC_MODE_RELEASE, "UART0");
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}
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static int mxc_uart1_pins[] = {
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PE3_PF_UART2_CTS,
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PE4_PF_UART2_RTS,
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PE6_PF_UART2_TXD,
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PE7_PF_UART2_RXD
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};
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static int uart_mxc_port1_init(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
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ARRAY_SIZE(mxc_uart1_pins),
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MXC_GPIO_ALLOC_MODE_NORMAL, "UART1");
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}
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static int uart_mxc_port1_exit(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
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ARRAY_SIZE(mxc_uart1_pins),
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MXC_GPIO_ALLOC_MODE_RELEASE, "UART1");
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}
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static int mxc_uart2_pins[] = {
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PE8_PF_UART3_TXD,
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PE9_PF_UART3_RXD,
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PE10_PF_UART3_CTS,
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PE11_PF_UART3_RTS
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};
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static int uart_mxc_port2_init(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
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ARRAY_SIZE(mxc_uart2_pins),
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MXC_GPIO_ALLOC_MODE_NORMAL, "UART2");
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}
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static int uart_mxc_port2_exit(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
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ARRAY_SIZE(mxc_uart2_pins),
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MXC_GPIO_ALLOC_MODE_RELEASE, "UART2");
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}
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static int mxc_uart3_pins[] = {
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PB26_AF_UART4_RTS,
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PB28_AF_UART4_TXD,
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PB29_AF_UART4_CTS,
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PB31_AF_UART4_RXD
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};
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static int uart_mxc_port3_init(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
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ARRAY_SIZE(mxc_uart3_pins),
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MXC_GPIO_ALLOC_MODE_NORMAL, "UART3");
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}
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static int uart_mxc_port3_exit(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
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ARRAY_SIZE(mxc_uart3_pins),
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MXC_GPIO_ALLOC_MODE_RELEASE, "UART3");
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}
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static int mxc_uart4_pins[] = {
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PB18_AF_UART5_TXD,
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PB19_AF_UART5_RXD,
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PB20_AF_UART5_CTS,
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PB21_AF_UART5_RTS
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};
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static int uart_mxc_port4_init(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
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ARRAY_SIZE(mxc_uart4_pins),
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MXC_GPIO_ALLOC_MODE_NORMAL, "UART4");
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}
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static int uart_mxc_port4_exit(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
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ARRAY_SIZE(mxc_uart4_pins),
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MXC_GPIO_ALLOC_MODE_RELEASE, "UART4");
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}
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static int mxc_uart5_pins[] = {
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PB10_AF_UART6_TXD,
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PB12_AF_UART6_CTS,
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PB11_AF_UART6_RXD,
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PB13_AF_UART6_RTS
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};
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static int uart_mxc_port5_init(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
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ARRAY_SIZE(mxc_uart5_pins),
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MXC_GPIO_ALLOC_MODE_NORMAL, "UART5");
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}
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static int uart_mxc_port5_exit(struct platform_device *pdev)
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{
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return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
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ARRAY_SIZE(mxc_uart5_pins),
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MXC_GPIO_ALLOC_MODE_RELEASE, "UART5");
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}
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static struct platform_device *platform_devices[] __initdata = {
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&mx27ads_nor_mtd_device,
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};
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static int mxc_fec_pins[] = {
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PD0_AIN_FEC_TXD0,
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PD1_AIN_FEC_TXD1,
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PD2_AIN_FEC_TXD2,
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PD3_AIN_FEC_TXD3,
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PD4_AOUT_FEC_RX_ER,
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PD5_AOUT_FEC_RXD1,
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PD6_AOUT_FEC_RXD2,
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PD7_AOUT_FEC_RXD3,
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PD8_AF_FEC_MDIO,
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PD9_AIN_FEC_MDC,
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PD10_AOUT_FEC_CRS,
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PD11_AOUT_FEC_TX_CLK,
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PD12_AOUT_FEC_RXD0,
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PD13_AOUT_FEC_RX_DV,
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PD14_AOUT_FEC_CLR,
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PD15_AOUT_FEC_COL,
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PD16_AIN_FEC_TX_ER,
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PF23_AIN_FEC_TX_EN
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};
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static void gpio_fec_active(void)
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{
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mxc_gpio_setup_multiple_pins(mxc_fec_pins,
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ARRAY_SIZE(mxc_fec_pins),
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MXC_GPIO_ALLOC_MODE_NORMAL, "FEC");
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}
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static void gpio_fec_inactive(void)
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{
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mxc_gpio_setup_multiple_pins(mxc_fec_pins,
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ARRAY_SIZE(mxc_fec_pins),
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MXC_GPIO_ALLOC_MODE_RELEASE, "FEC");
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}
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static struct imxuart_platform_data uart_pdata[] = {
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{
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.init = uart_mxc_port0_init,
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.exit = uart_mxc_port0_exit,
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.flags = IMXUART_HAVE_RTSCTS,
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}, {
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.init = uart_mxc_port1_init,
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.exit = uart_mxc_port1_exit,
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.flags = IMXUART_HAVE_RTSCTS,
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}, {
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.init = uart_mxc_port2_init,
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.exit = uart_mxc_port2_exit,
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.flags = IMXUART_HAVE_RTSCTS,
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}, {
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.init = uart_mxc_port3_init,
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.exit = uart_mxc_port3_exit,
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.flags = IMXUART_HAVE_RTSCTS,
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}, {
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.init = uart_mxc_port4_init,
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.exit = uart_mxc_port4_exit,
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.flags = IMXUART_HAVE_RTSCTS,
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}, {
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.init = uart_mxc_port5_init,
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.exit = uart_mxc_port5_exit,
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.flags = IMXUART_HAVE_RTSCTS,
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},
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};
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static void __init mx27ads_board_init(void)
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{
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int i;
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gpio_fec_active();
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for (i = 0; i < 6; i++)
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imx_init_uart(i, &uart_pdata[i]);
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platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
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}
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static void __init mx27ads_timer_init(void)
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{
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unsigned long fref = 26000000;
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if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0)
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fref = 27000000;
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mxc_clocks_init(fref);
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mxc_timer_init("gpt_clk.0");
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}
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struct sys_timer mx27ads_timer = {
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.init = mx27ads_timer_init,
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};
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static struct map_desc mx27ads_io_desc[] __initdata = {
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{
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.virtual = PBC_BASE_ADDRESS,
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.pfn = __phys_to_pfn(CS4_BASE_ADDR),
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.length = SZ_1M,
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.type = MT_DEVICE,
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},
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};
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void __init mx27ads_map_io(void)
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{
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mxc_map_io();
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iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc));
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}
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MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
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/* maintainer: Freescale Semiconductor, Inc. */
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.phys_io = AIPI_BASE_ADDR,
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.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = mx27ads_map_io,
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.init_irq = mxc_init_irq,
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.init_machine = mx27ads_board_init,
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.timer = &mx27ads_timer,
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MACHINE_END
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