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clk: hisilicon: add missing usb3 clocks for Hi3798CV200 SoC

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There are two USB3 host controllers on Hi3798CV200 SoC.
This commit adds missing clocks for them.

Signed-off-by: Jianguo Sun <sunjianguo1@huawei.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Jianguo Sun
2018-05-04 16:56:30 +08:00
committed by Stephen Boyd
parent 60cc43fc88
commit 80820a7bc8
2 changed files with 25 additions and 0 deletions
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8
include/dt-bindings/clock/histb-clock.h
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@@ -62,6 +62,14 @@
#define HISTB_USB2_PHY1_REF_CLK 40
#define HISTB_USB2_PHY2_REF_CLK 41
#define HISTB_COMBPHY0_CLK 42
#define HISTB_USB3_BUS_CLK 43
#define HISTB_USB3_UTMI_CLK 44
#define HISTB_USB3_PIPE_CLK 45
#define HISTB_USB3_SUSPEND_CLK 46
#define HISTB_USB3_BUS_CLK1 47
#define HISTB_USB3_UTMI_CLK1 48
#define HISTB_USB3_PIPE_CLK1 49
#define HISTB_USB3_SUSPEND_CLK1 50
/* clocks provided by mcu CRG */
#define HISTB_MCE_CLK 1