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mmc: sdhci_am654: Improve whitespace utilisation with regmap_*() calls

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Line wrapping with the regmap_*() functions is way more conservative
than required by the 80 character rule. Expand the function calls out to
use less number of lines.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Faiz Abbas
2019-05-28 15:29:27 +05:30
committed by Ulf Hansson
parent 65f1a0d39c
commit 8023cf2634
1 changed files with 13 additions and 21 deletions
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34
drivers/mmc/host/sdhci_am654.c
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@@ -88,8 +88,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
int ret;
if (sdhci_am654->dll_on) {
regmap_update_bits(sdhci_am654->base, PHY_CTRL1,
ENDLL_MASK, 0);
regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0);
sdhci_am654->dll_on = false;
}
@@ -101,8 +100,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
val = (1 << OTAPDLYENA_SHIFT) |
(sdhci_am654->otap_del_sel << OTAPDLYSEL_SHIFT);
regmap_update_bits(sdhci_am654->base, PHY_CTRL4,
mask, val);
regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);
switch (clock) {
case 200000000:
sel50 = 0;
@@ -120,8 +118,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
/* Configure PHY DLL frequency */
mask = SEL50_MASK | SEL100_MASK;
val = (sel50 << SEL50_SHIFT) | (sel100 << SEL100_SHIFT);
regmap_update_bits(sdhci_am654->base, PHY_CTRL5,
mask, val);
regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val);
/* Configure DLL TRIM */
mask = DLL_TRIM_ICP_MASK;
val = sdhci_am654->trm_icp << DLL_TRIM_ICP_SHIFT;
@@ -129,20 +126,17 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
/* Configure DLL driver strength */
mask |= DR_TY_MASK;
val |= sdhci_am654->drv_strength << DR_TY_SHIFT;
regmap_update_bits(sdhci_am654->base, PHY_CTRL1,
mask, val);
regmap_update_bits(sdhci_am654->base, PHY_CTRL1, mask, val);
/* Enable DLL */
regmap_update_bits(sdhci_am654->base, PHY_CTRL1,
ENDLL_MASK, 0x1 << ENDLL_SHIFT);
regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK,
0x1 << ENDLL_SHIFT);
/*
* Poll for DLL ready. Use a one second timeout.
* Works in all experiments done so far
*/
ret = regmap_read_poll_timeout(sdhci_am654->base,
PHY_STAT1, val,
val & DLLRDY_MASK,
1000, 1000000);
ret = regmap_read_poll_timeout(sdhci_am654->base, PHY_STAT1,
val, val & DLLRDY_MASK, 1000,
1000000);
sdhci_am654->dll_on = true;
}
}
@@ -208,8 +202,7 @@ static int sdhci_am654_init(struct sdhci_host *host)
/* Reset OTAP to default value */
mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
regmap_update_bits(sdhci_am654->base, PHY_CTRL4,
mask, 0x0);
regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, 0x0);
regmap_read(sdhci_am654->base, PHY_STAT1, &val);
if (~val & CALDONE_MASK) {
@@ -223,15 +216,14 @@ static int sdhci_am654_init(struct sdhci_host *host)
}
/* Enable pins by setting IO mux to 0 */
regmap_update_bits(sdhci_am654->base, PHY_CTRL1,
IOMUX_ENABLE_MASK, 0);
regmap_update_bits(sdhci_am654->base, PHY_CTRL1, IOMUX_ENABLE_MASK, 0);
/* Set slot type based on SD or eMMC */
if (host->mmc->caps & MMC_CAP_NONREMOVABLE)
ctl_cfg_2 = SLOTTYPE_EMBEDDED;
regmap_update_bits(sdhci_am654->base, CTL_CFG_2,
SLOTTYPE_MASK, ctl_cfg_2);
regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK,
ctl_cfg_2);
return sdhci_add_host(host);
}