drm/i915/gvt: Change flood gvt dmesg into trace
Currently gvt dmesg is so heavy at drm.debug=0x2 that guest and host almost couldn't run on xengt. This patch transfer these repeated messages into trace, so dmesg is light at drm.debug=0x2, and user could get the target message through trace event and trace filter. Suggested-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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@@ -133,8 +133,7 @@ static inline int intel_gvt_hypervisor_inject_msi(struct intel_vgpu *vgpu)
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if (WARN(control & GENMASK(15, 1), "only support one MSI format\n"))
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return -EINVAL;
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gvt_dbg_irq("vgpu%d: inject msi address %x data%x\n", vgpu->id, addr,
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data);
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trace_inject_msi(vgpu->id, addr, data);
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ret = intel_gvt_host.mpt->inject_msi(vgpu->handle, addr, data);
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if (ret)
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