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powerpc/64s: system call support for scv/rfscv instructions

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Add support for the scv instruction on POWER9 and later CPUs.

For now this implements the zeroth scv vector 'scv 0', as identical to
'sc' system calls, with the exception that LR is not preserved, nor
are volatile CR registers, and error is not indicated with CR0[SO],
but by returning a negative errno.

rfscv is implemented to return from scv type system calls. It can not
be used to return from sc system calls because those are defined to
preserve LR.

getpid syscall throughput on POWER9 is improved by 26% (428 to 318
cycles), largely due to reducing mtmsr and mtspr.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Fix ppc64e build]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200611081203.995112-3-npiggin@gmail.com
This commit is contained in:
Nicholas Piggin
2020-06-11 18:12:03 +10:00
committed by Michael Ellerman
parent b2dc2977cb
commit 7fa95f9ada
20 changed files with 422 additions and 45 deletions
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10
arch/powerpc/kernel/cpu_setup_power.S
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@@ -98,7 +98,7 @@ _GLOBAL(__setup_cpu_power10)
_GLOBAL(__setup_cpu_power9)
mflr r11
bl __init_FSCR
bl __init_FSCR_power9
1: bl __init_PMU
bl __init_hvmode_206
mtlr r11
@@ -128,7 +128,7 @@ _GLOBAL(__restore_cpu_power10)
_GLOBAL(__restore_cpu_power9)
mflr r11
bl __init_FSCR
bl __init_FSCR_power9
1: bl __init_PMU
mfmsr r3
rldicl. r0,r3,4,63
@@ -198,6 +198,12 @@ __init_FSCR_power10:
mtspr SPRN_FSCR, r3
// fall through
__init_FSCR_power9:
mfspr r3, SPRN_FSCR
ori r3, r3, FSCR_SCV
mtspr SPRN_FSCR, r3
// fall through
__init_FSCR:
mfspr r3,SPRN_FSCR
ori r3,r3,FSCR_TAR|FSCR_EBB