Merge tag 'drm-intel-next-fixes-2016-05-25' of git://anongit.freedesktop.org/drm-intel into drm-next
I see the main drm pull got merged, here's the first batch of fixes for 4.7 already. Fixes all around, a large portion cc: stable stuff. [airlied: the DP++ stuff is a regression fix]. * tag 'drm-intel-next-fixes-2016-05-25' of git://anongit.freedesktop.org/drm-intel: drm/i915: Stop automatically retiring requests after a GPU hang drm/i915: Unify intel_ring_begin() drm/i915: Ignore stale wm register values on resume on ilk-bdw (v2) drm/i915/psr: Try to program link training times correctly drm/i915/bxt: Adjusting the error in horizontal timings retrieval drm/i915: Don't leave old junk in ilk active watermarks on readout drm/i915: s/DPPL/DPLL/ for SKL DPLLs drm/i915: Fix gen8 semaphores id for legacy mode drm/i915: Set crtc_state->lane_count for HDMI drm/i915/BXT: Retrieving the horizontal timing for DSI drm/i915: Protect gen7 irq_seqno_barrier with uncore lock drm/i915: Re-enable GGTT earlier during resume on pre-gen6 platforms drm/i915: Determine DP++ type 1 DVI adaptor presence based on VBT drm/i915: Enable/disable TMDS output buffers in DP++ adaptor as needed drm/i915: Respect DP++ adaptor TMDS clock limit drm: Add helper for DP++ adaptors
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@@ -12005,6 +12005,9 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
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DRM_DEBUG_KMS("No valid intermediate pipe watermarks are possible\n");
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return ret;
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}
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} else if (dev_priv->display.compute_intermediate_wm) {
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if (HAS_PCH_SPLIT(dev_priv) && INTEL_GEN(dev_priv) < 9)
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pipe_config->wm.intermediate = pipe_config->wm.optimal.ilk;
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}
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if (INTEL_INFO(dev)->gen >= 9) {
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@@ -15990,6 +15993,9 @@ retry:
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state->acquire_ctx = &ctx;
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/* ignore any reset values/BIOS leftovers in the WM registers */
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to_intel_atomic_state(state)->skip_intermediate_wm = true;
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for_each_crtc_in_state(state, crtc, crtc_state, i) {
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/*
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* Force recalculation even if we restore
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