PCI: altera: Fix loop in tlp_read_packet()
TLP_LOOP is 500 and the "loop" variable was a u8 so "loop < TLP_LOOP" is
always true. We only need this condition to work if there is a problem so
it would have been easy to miss this in testing.
Make it a normal for loop with "int i" instead of over thinking things and
making it complicated.
Fixes: 6bb4dd154ae8 ("PCI: altera: Add Altera PCIe host controller driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Ley Foon Tan <lftan@altera.com>
This commit is contained in:
committed by
Bjorn Helgaas
parent
3845d2953a
commit
7f52f31443
@@ -166,7 +166,7 @@ static bool altera_pcie_valid_config(struct altera_pcie *pcie,
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static int tlp_read_packet(struct altera_pcie *pcie, u32 *value)
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static int tlp_read_packet(struct altera_pcie *pcie, u32 *value)
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{
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{
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u8 loop;
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int i;
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bool sop = 0;
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bool sop = 0;
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u32 ctrl;
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u32 ctrl;
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u32 reg0, reg1;
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u32 reg0, reg1;
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@@ -175,7 +175,7 @@ static int tlp_read_packet(struct altera_pcie *pcie, u32 *value)
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* Minimum 2 loops to read TLP headers and 1 loop to read data
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* Minimum 2 loops to read TLP headers and 1 loop to read data
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* payload.
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* payload.
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*/
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*/
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for (loop = 0; loop < TLP_LOOP; loop++) {
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for (i = 0; i < TLP_LOOP; i++) {
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ctrl = cra_readl(pcie, RP_RXCPL_STATUS);
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ctrl = cra_readl(pcie, RP_RXCPL_STATUS);
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if ((ctrl & RP_RXCPL_SOP) || (ctrl & RP_RXCPL_EOP) || sop) {
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if ((ctrl & RP_RXCPL_SOP) || (ctrl & RP_RXCPL_EOP) || sop) {
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reg0 = cra_readl(pcie, RP_RXCPL_REG0);
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reg0 = cra_readl(pcie, RP_RXCPL_REG0);
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