Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6: (250 commits) ALSA: hda: Storage class should be before const qualifier ASoC: tpa6130a2: Remove CPVSS and HPVdd supplies ASoC: tpa6130a2: Define output pins with SND_SOC_DAPM_OUTPUT ASoC: sdp4430 - add sdp4430 pcm ops to DAI. ASoC: TWL6040: Enable earphone path in codec ASoC: SDP4430: Add support for Earphone speaker ASoC: SDP4430: Add sdp4430 machine driver ASoC: tlv320dac33: Avoid powering off while in BIAS_OFF ASoC: tlv320dac33: Use dev_dbg in dac33_hard_power function ALSA: sound/pci/asihpi: Use kzalloc ALSA: hdmi - dont fail on extra nodes ALSA: intelhdmi - add id for the CougarPoint chipset ALSA: intelhdmi - user friendly codec name ALSA: intelhdmi - add dependency on SND_DYNAMIC_MINORS ALSA: asihpi: incorrect range check ALSA: asihpi: testing the wrong variable ALSA: es1688: add pedantic range checks ARM: McBSP: Add support for omap4 in McBSP driver ARM: McBSP: Fix request for irq in OMAP4 OMAP: McBSP: Add 32-bit mode support ...
This commit is contained in:
@@ -574,7 +574,7 @@ enum {
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#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
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struct snd_timer_id {
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int dev_class;
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int dev_class;
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int dev_sclass;
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int card;
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int device;
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@@ -762,7 +762,7 @@ struct snd_ctl_elem_id {
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snd_ctl_elem_iface_t iface; /* interface identifier */
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unsigned int device; /* device/client number */
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unsigned int subdevice; /* subdevice (substream) number */
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unsigned char name[44]; /* ASCII name of item */
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unsigned char name[44]; /* ASCII name of item */
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unsigned int index; /* index of item */
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};
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@@ -809,7 +809,7 @@ struct snd_ctl_elem_info {
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struct snd_ctl_elem_value {
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struct snd_ctl_elem_id id; /* W: element ID */
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unsigned int indirect: 1; /* W: indirect access - obsoleted */
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union {
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union {
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union {
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long value[128];
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long *value_ptr; /* obsoleted */
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@@ -827,15 +827,15 @@ struct snd_ctl_elem_value {
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unsigned char *data_ptr; /* obsoleted */
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} bytes;
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struct snd_aes_iec958 iec958;
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} value; /* RO */
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} value; /* RO */
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struct timespec tstamp;
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unsigned char reserved[128-sizeof(struct timespec)];
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unsigned char reserved[128-sizeof(struct timespec)];
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};
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struct snd_ctl_tlv {
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unsigned int numid; /* control element numeric identification */
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unsigned int length; /* in bytes aligned to 4 */
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unsigned int tlv[0]; /* first TLV */
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unsigned int numid; /* control element numeric identification */
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unsigned int length; /* in bytes aligned to 4 */
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unsigned int tlv[0]; /* first TLV */
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};
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#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
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@@ -886,8 +886,8 @@ struct snd_ctl_event {
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unsigned int mask;
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struct snd_ctl_elem_id id;
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} elem;
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unsigned char data8[60];
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} data;
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unsigned char data8[60];
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} data;
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};
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/*
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@@ -44,7 +44,6 @@ struct snd_es1688 {
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unsigned char pad;
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unsigned int dma_size;
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struct snd_card *card;
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struct snd_pcm *pcm;
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struct snd_pcm_substream *playback_substream;
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struct snd_pcm_substream *capture_substream;
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@@ -108,14 +107,16 @@ struct snd_es1688 {
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void snd_es1688_mixer_write(struct snd_es1688 *chip, unsigned char reg, unsigned char data);
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int snd_es1688_create(struct snd_card *card,
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struct snd_es1688 *chip,
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unsigned long port,
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unsigned long mpu_port,
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int irq,
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int mpu_irq,
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int dma8,
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unsigned short hardware,
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struct snd_es1688 ** rchip);
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int snd_es1688_pcm(struct snd_es1688 *chip, int device, struct snd_pcm ** rpcm);
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int snd_es1688_mixer(struct snd_es1688 *chip);
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unsigned short hardware);
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int snd_es1688_pcm(struct snd_card *card, struct snd_es1688 *chip, int device,
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struct snd_pcm **rpcm);
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int snd_es1688_mixer(struct snd_card *card, struct snd_es1688 *chip);
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int snd_es1688_reset(struct snd_es1688 *chip);
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#endif /* __SOUND_ES1688_H */
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@@ -51,18 +51,18 @@ struct snd_info_entry_ops {
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unsigned short mode, void **file_private_data);
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int (*release)(struct snd_info_entry *entry,
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unsigned short mode, void *file_private_data);
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long (*read)(struct snd_info_entry *entry, void *file_private_data,
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struct file *file, char __user *buf,
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unsigned long count, unsigned long pos);
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long (*write)(struct snd_info_entry *entry, void *file_private_data,
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struct file *file, const char __user *buf,
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unsigned long count, unsigned long pos);
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long long (*llseek)(struct snd_info_entry *entry,
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void *file_private_data, struct file *file,
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long long offset, int orig);
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unsigned int(*poll)(struct snd_info_entry *entry,
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void *file_private_data, struct file *file,
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poll_table *wait);
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ssize_t (*read)(struct snd_info_entry *entry, void *file_private_data,
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struct file *file, char __user *buf,
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size_t count, loff_t pos);
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ssize_t (*write)(struct snd_info_entry *entry, void *file_private_data,
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struct file *file, const char __user *buf,
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size_t count, loff_t pos);
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loff_t (*llseek)(struct snd_info_entry *entry,
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void *file_private_data, struct file *file,
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loff_t offset, int orig);
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unsigned int (*poll)(struct snd_info_entry *entry,
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void *file_private_data, struct file *file,
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poll_table *wait);
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int (*ioctl)(struct snd_info_entry *entry, void *file_private_data,
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struct file *file, unsigned int cmd, unsigned long arg);
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int (*mmap)(struct snd_info_entry *entry, void *file_private_data,
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@@ -42,6 +42,11 @@ enum snd_jack_types {
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SND_JACK_MECHANICAL = 0x0008, /* If detected separately */
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SND_JACK_VIDEOOUT = 0x0010,
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SND_JACK_AVOUT = SND_JACK_LINEOUT | SND_JACK_VIDEOOUT,
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/* Kept separate from switches to facilitate implementation */
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SND_JACK_BTN_0 = 0x4000,
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SND_JACK_BTN_1 = 0x2000,
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SND_JACK_BTN_2 = 0x1000,
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};
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struct snd_jack {
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@@ -50,6 +55,7 @@ struct snd_jack {
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int type;
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const char *id;
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char name[100];
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unsigned int key[3]; /* Keep in sync with definitions above */
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void *private_data;
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void (*private_free)(struct snd_jack *);
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};
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@@ -59,6 +65,8 @@ struct snd_jack {
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int snd_jack_new(struct snd_card *card, const char *id, int type,
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struct snd_jack **jack);
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void snd_jack_set_parent(struct snd_jack *jack, struct device *parent);
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int snd_jack_set_key(struct snd_jack *jack, enum snd_jack_types type,
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int keytype);
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void snd_jack_report(struct snd_jack *jack, int status);
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@@ -182,6 +182,12 @@ struct snd_soc_dai_ops {
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struct snd_soc_dai *);
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int (*trigger)(struct snd_pcm_substream *, int,
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struct snd_soc_dai *);
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/*
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* For hardware based FIFO caused delay reporting.
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* Optional.
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*/
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snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
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struct snd_soc_dai *);
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};
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/*
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@@ -215,7 +221,6 @@ struct snd_soc_dai {
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unsigned int symmetric_rates:1;
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/* DAI runtime info */
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struct snd_pcm_runtime *runtime;
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struct snd_soc_codec *codec;
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unsigned int active;
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unsigned char pop_wait:1;
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@@ -339,6 +339,9 @@ int snd_soc_dapm_disable_pin(struct snd_soc_codec *codec, const char *pin);
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int snd_soc_dapm_nc_pin(struct snd_soc_codec *codec, const char *pin);
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int snd_soc_dapm_get_pin_status(struct snd_soc_codec *codec, const char *pin);
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int snd_soc_dapm_sync(struct snd_soc_codec *codec);
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int snd_soc_dapm_force_enable_pin(struct snd_soc_codec *codec,
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const char *pin);
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int snd_soc_dapm_ignore_suspend(struct snd_soc_codec *codec, const char *pin);
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/* dapm widget types */
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enum snd_soc_dapm_type {
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@@ -425,9 +428,8 @@ struct snd_soc_dapm_widget {
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unsigned char connected:1; /* connected codec pin */
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unsigned char new:1; /* cnew complete */
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unsigned char ext:1; /* has external widgets */
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unsigned char muted:1; /* muted for pop reduction */
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unsigned char suspend:1; /* was active before suspend */
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unsigned char pmdown:1; /* waiting for timeout */
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unsigned char force:1; /* force state */
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unsigned char ignore_suspend:1; /* kept enabled over suspend */
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int (*power_check)(struct snd_soc_dapm_widget *w);
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@@ -15,6 +15,7 @@
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <linux/notifier.h>
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#include <linux/workqueue.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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@@ -29,10 +30,10 @@
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#define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) \
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((unsigned long)&(struct soc_mixer_control) \
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{.reg = xreg, .shift = xshift, .rshift = xshift, .max = xmax, \
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.invert = xinvert})
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.platform_max = xmax, .invert = xinvert})
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#define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \
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((unsigned long)&(struct soc_mixer_control) \
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{.reg = xreg, .max = xmax, .invert = xinvert})
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{.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert})
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#define SOC_SINGLE(xname, reg, shift, max, invert) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
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.info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
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@@ -52,14 +53,14 @@
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.put = snd_soc_put_volsw, \
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.private_value = (unsigned long)&(struct soc_mixer_control) \
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{.reg = xreg, .shift = shift_left, .rshift = shift_right, \
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.max = xmax, .invert = xinvert} }
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.max = xmax, .platform_max = xmax, .invert = xinvert} }
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#define SOC_DOUBLE_R(xname, reg_left, reg_right, xshift, xmax, xinvert) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
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.info = snd_soc_info_volsw_2r, \
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.get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
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.private_value = (unsigned long)&(struct soc_mixer_control) \
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{.reg = reg_left, .rreg = reg_right, .shift = xshift, \
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.max = xmax, .invert = xinvert} }
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.max = xmax, .platform_max = xmax, .invert = xinvert} }
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#define SOC_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert, tlv_array) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
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.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
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@@ -69,7 +70,7 @@
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.put = snd_soc_put_volsw, \
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.private_value = (unsigned long)&(struct soc_mixer_control) \
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{.reg = xreg, .shift = shift_left, .rshift = shift_right,\
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.max = xmax, .invert = xinvert} }
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.max = xmax, .platform_max = xmax, .invert = xinvert} }
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#define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
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.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
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@@ -79,7 +80,7 @@
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.get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
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.private_value = (unsigned long)&(struct soc_mixer_control) \
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{.reg = reg_left, .rreg = reg_right, .shift = xshift, \
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.max = xmax, .invert = xinvert} }
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.max = xmax, .platform_max = xmax, .invert = xinvert} }
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#define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
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.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
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@@ -88,7 +89,8 @@
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.info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \
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.put = snd_soc_put_volsw_s8, \
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.private_value = (unsigned long)&(struct soc_mixer_control) \
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{.reg = xreg, .min = xmin, .max = xmax} }
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{.reg = xreg, .min = xmin, .max = xmax, \
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.platform_max = xmax} }
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#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmax, xtexts) \
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{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
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.max = xmax, .texts = xtexts }
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@@ -125,7 +127,7 @@
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.get = xhandler_get, .put = xhandler_put, \
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.private_value = (unsigned long)&(struct soc_mixer_control) \
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{.reg = xreg, .shift = shift_left, .rshift = shift_right, \
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.max = xmax, .invert = xinvert} }
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.max = xmax, .platform_max = xmax, .invert = xinvert} }
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#define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\
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xhandler_get, xhandler_put, tlv_array) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
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@@ -145,7 +147,7 @@
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.get = xhandler_get, .put = xhandler_put, \
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.private_value = (unsigned long)&(struct soc_mixer_control) \
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{.reg = xreg, .shift = shift_left, .rshift = shift_right, \
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.max = xmax, .invert = xinvert} }
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.max = xmax, .platform_max = xmax, .invert = xinvert} }
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#define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\
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xhandler_get, xhandler_put, tlv_array) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
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@@ -156,7 +158,7 @@
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.get = xhandler_get, .put = xhandler_put, \
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.private_value = (unsigned long)&(struct soc_mixer_control) \
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{.reg = reg_left, .rreg = reg_right, .shift = xshift, \
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.max = xmax, .invert = xinvert} }
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.max = xmax, .platform_max = xmax, .invert = xinvert} }
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#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
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.info = snd_soc_info_bool_ext, \
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@@ -212,6 +214,7 @@ struct snd_soc_dai_mode;
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struct snd_soc_pcm_runtime;
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struct snd_soc_dai;
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struct snd_soc_platform;
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struct snd_soc_dai_link;
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struct snd_soc_codec;
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struct soc_enum;
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struct snd_soc_ac97_ops;
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@@ -260,6 +263,10 @@ int snd_soc_jack_new(struct snd_soc_card *card, const char *id, int type,
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void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask);
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int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
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struct snd_soc_jack_pin *pins);
|
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void snd_soc_jack_notifier_register(struct snd_soc_jack *jack,
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struct notifier_block *nb);
|
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void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack,
|
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struct notifier_block *nb);
|
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#ifdef CONFIG_GPIOLIB
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int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
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struct snd_soc_jack_gpio *gpios);
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@@ -320,6 +327,8 @@ int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol);
|
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int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
|
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struct snd_ctl_elem_value *ucontrol);
|
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int snd_soc_limit_volume(struct snd_soc_codec *codec,
|
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const char *name, int max);
|
||||
|
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/**
|
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* struct snd_soc_jack_pin - Describes a pin to update based on jack detection
|
||||
@@ -363,6 +372,7 @@ struct snd_soc_jack {
|
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struct snd_soc_card *card;
|
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struct list_head pins;
|
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int status;
|
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struct blocking_notifier_head notifier;
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};
|
||||
|
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/* SoC PCM stream information */
|
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@@ -374,7 +384,7 @@ struct snd_soc_pcm_stream {
|
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unsigned int rate_max; /* max rate */
|
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unsigned int channels_min; /* min channels */
|
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unsigned int channels_max; /* max channels */
|
||||
unsigned int active:1; /* stream is in use */
|
||||
unsigned int active; /* stream is in use */
|
||||
void *dma_data; /* used by platform code */
|
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};
|
||||
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||||
@@ -407,7 +417,7 @@ struct snd_soc_codec {
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struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */
|
||||
unsigned int active;
|
||||
unsigned int pcm_devs;
|
||||
void *private_data;
|
||||
void *drvdata;
|
||||
|
||||
/* codec IO */
|
||||
void *control_data; /* codec control (i2c/3wire) data */
|
||||
@@ -462,14 +472,21 @@ struct snd_soc_platform {
|
||||
|
||||
int (*probe)(struct platform_device *pdev);
|
||||
int (*remove)(struct platform_device *pdev);
|
||||
int (*suspend)(struct snd_soc_dai *dai);
|
||||
int (*resume)(struct snd_soc_dai *dai);
|
||||
int (*suspend)(struct snd_soc_dai_link *dai_link);
|
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int (*resume)(struct snd_soc_dai_link *dai_link);
|
||||
|
||||
/* pcm creation and destruction */
|
||||
int (*pcm_new)(struct snd_card *, struct snd_soc_dai *,
|
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struct snd_pcm *);
|
||||
void (*pcm_free)(struct snd_pcm *);
|
||||
|
||||
/*
|
||||
* For platform caused delay reporting.
|
||||
* Optional.
|
||||
*/
|
||||
snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
|
||||
struct snd_soc_dai *);
|
||||
|
||||
/* platform stream ops */
|
||||
struct snd_pcm_ops *pcm_ops;
|
||||
};
|
||||
@@ -489,6 +506,9 @@ struct snd_soc_dai_link {
|
||||
/* codec/machine specific init - e.g. add machine controls */
|
||||
int (*init)(struct snd_soc_codec *codec);
|
||||
|
||||
/* Keep DAI active over suspend */
|
||||
unsigned int ignore_suspend:1;
|
||||
|
||||
/* Symmetry requirements */
|
||||
unsigned int symmetric_rates:1;
|
||||
|
||||
@@ -553,7 +573,7 @@ struct snd_soc_pcm_runtime {
|
||||
|
||||
/* mixer control */
|
||||
struct soc_mixer_control {
|
||||
int min, max;
|
||||
int min, max, platform_max;
|
||||
unsigned int reg, rreg, shift, rshift, invert;
|
||||
};
|
||||
|
||||
@@ -583,6 +603,17 @@ static inline unsigned int snd_soc_write(struct snd_soc_codec *codec,
|
||||
return codec->write(codec, reg, val);
|
||||
}
|
||||
|
||||
static inline void snd_soc_codec_set_drvdata(struct snd_soc_codec *codec,
|
||||
void *data)
|
||||
{
|
||||
codec->drvdata = data;
|
||||
}
|
||||
|
||||
static inline void *snd_soc_codec_get_drvdata(struct snd_soc_codec *codec)
|
||||
{
|
||||
return codec->drvdata;
|
||||
}
|
||||
|
||||
#include <sound/soc-dai.h>
|
||||
|
||||
#endif
|
||||
|
17
include/sound/tlv320aic3x.h
Normal file
17
include/sound/tlv320aic3x.h
Normal file
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Platform data for Texas Instruments TLV320AIC3x codec
|
||||
*
|
||||
* Author: Jarkko Nikula <jhnikula@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __TLV320AIC3x_H__
|
||||
#define __TLV320AIC3x_H__
|
||||
|
||||
struct aic3x_pdata {
|
||||
int gpio_reset; /* < 0 if not used */
|
||||
};
|
||||
|
||||
#endif
|
@@ -15,6 +15,7 @@
|
||||
|
||||
struct tlv320dac33_platform_data {
|
||||
int power_gpio;
|
||||
int keep_bclk; /* Keep the BCLK running in FIFO modes */
|
||||
u8 burst_bclkdiv;
|
||||
};
|
||||
|
||||
|
@@ -21,6 +21,7 @@ struct uda134x_platform_data {
|
||||
#define UDA134X_UDA1340 1
|
||||
#define UDA134X_UDA1341 2
|
||||
#define UDA134X_UDA1344 3
|
||||
#define UDA134X_UDA1345 4
|
||||
};
|
||||
|
||||
#endif /* _UDA134X_H */
|
||||
|
@@ -1,3 +1,3 @@
|
||||
/* include/version.h */
|
||||
#define CONFIG_SND_VERSION "1.0.22.1"
|
||||
#define CONFIG_SND_VERSION "1.0.23"
|
||||
#define CONFIG_SND_DATE ""
|
||||
|
249
include/sound/wm8903.h
Normal file
249
include/sound/wm8903.h
Normal file
@@ -0,0 +1,249 @@
|
||||
/*
|
||||
* linux/sound/wm8903.h -- Platform data for WM8903
|
||||
*
|
||||
* Copyright 2010 Wolfson Microelectronics. PLC.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_SND_WM8903_H
|
||||
#define __LINUX_SND_WM8903_H
|
||||
|
||||
/* Used to enable configuration of a GPIO to all zeros */
|
||||
#define WM8903_GPIO_NO_CONFIG 0x8000
|
||||
|
||||
/*
|
||||
* R6 (0x06) - Mic Bias Control 0
|
||||
*/
|
||||
#define WM8903_MICDET_HYST_ENA 0x0080 /* MICDET_HYST_ENA */
|
||||
#define WM8903_MICDET_HYST_ENA_MASK 0x0080 /* MICDET_HYST_ENA */
|
||||
#define WM8903_MICDET_HYST_ENA_SHIFT 7 /* MICDET_HYST_ENA */
|
||||
#define WM8903_MICDET_HYST_ENA_WIDTH 1 /* MICDET_HYST_ENA */
|
||||
#define WM8903_MICDET_THR_MASK 0x0070 /* MICDET_THR - [6:4] */
|
||||
#define WM8903_MICDET_THR_SHIFT 4 /* MICDET_THR - [6:4] */
|
||||
#define WM8903_MICDET_THR_WIDTH 3 /* MICDET_THR - [6:4] */
|
||||
#define WM8903_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */
|
||||
#define WM8903_MICSHORT_THR_SHIFT 2 /* MICSHORT_THR - [3:2] */
|
||||
#define WM8903_MICSHORT_THR_WIDTH 2 /* MICSHORT_THR - [3:2] */
|
||||
#define WM8903_MICDET_ENA 0x0002 /* MICDET_ENA */
|
||||
#define WM8903_MICDET_ENA_MASK 0x0002 /* MICDET_ENA */
|
||||
#define WM8903_MICDET_ENA_SHIFT 1 /* MICDET_ENA */
|
||||
#define WM8903_MICDET_ENA_WIDTH 1 /* MICDET_ENA */
|
||||
#define WM8903_MICBIAS_ENA 0x0001 /* MICBIAS_ENA */
|
||||
#define WM8903_MICBIAS_ENA_MASK 0x0001 /* MICBIAS_ENA */
|
||||
#define WM8903_MICBIAS_ENA_SHIFT 0 /* MICBIAS_ENA */
|
||||
#define WM8903_MICBIAS_ENA_WIDTH 1 /* MICBIAS_ENA */
|
||||
|
||||
/*
|
||||
* R116 (0x74) - GPIO Control 1
|
||||
*/
|
||||
#define WM8903_GP1_FN_MASK 0x1F00 /* GP1_FN - [12:8] */
|
||||
#define WM8903_GP1_FN_SHIFT 8 /* GP1_FN - [12:8] */
|
||||
#define WM8903_GP1_FN_WIDTH 5 /* GP1_FN - [12:8] */
|
||||
#define WM8903_GP1_DIR 0x0080 /* GP1_DIR */
|
||||
#define WM8903_GP1_DIR_MASK 0x0080 /* GP1_DIR */
|
||||
#define WM8903_GP1_DIR_SHIFT 7 /* GP1_DIR */
|
||||
#define WM8903_GP1_DIR_WIDTH 1 /* GP1_DIR */
|
||||
#define WM8903_GP1_OP_CFG 0x0040 /* GP1_OP_CFG */
|
||||
#define WM8903_GP1_OP_CFG_MASK 0x0040 /* GP1_OP_CFG */
|
||||
#define WM8903_GP1_OP_CFG_SHIFT 6 /* GP1_OP_CFG */
|
||||
#define WM8903_GP1_OP_CFG_WIDTH 1 /* GP1_OP_CFG */
|
||||
#define WM8903_GP1_IP_CFG 0x0020 /* GP1_IP_CFG */
|
||||
#define WM8903_GP1_IP_CFG_MASK 0x0020 /* GP1_IP_CFG */
|
||||
#define WM8903_GP1_IP_CFG_SHIFT 5 /* GP1_IP_CFG */
|
||||
#define WM8903_GP1_IP_CFG_WIDTH 1 /* GP1_IP_CFG */
|
||||
#define WM8903_GP1_LVL 0x0010 /* GP1_LVL */
|
||||
#define WM8903_GP1_LVL_MASK 0x0010 /* GP1_LVL */
|
||||
#define WM8903_GP1_LVL_SHIFT 4 /* GP1_LVL */
|
||||
#define WM8903_GP1_LVL_WIDTH 1 /* GP1_LVL */
|
||||
#define WM8903_GP1_PD 0x0008 /* GP1_PD */
|
||||
#define WM8903_GP1_PD_MASK 0x0008 /* GP1_PD */
|
||||
#define WM8903_GP1_PD_SHIFT 3 /* GP1_PD */
|
||||
#define WM8903_GP1_PD_WIDTH 1 /* GP1_PD */
|
||||
#define WM8903_GP1_PU 0x0004 /* GP1_PU */
|
||||
#define WM8903_GP1_PU_MASK 0x0004 /* GP1_PU */
|
||||
#define WM8903_GP1_PU_SHIFT 2 /* GP1_PU */
|
||||
#define WM8903_GP1_PU_WIDTH 1 /* GP1_PU */
|
||||
#define WM8903_GP1_INTMODE 0x0002 /* GP1_INTMODE */
|
||||
#define WM8903_GP1_INTMODE_MASK 0x0002 /* GP1_INTMODE */
|
||||
#define WM8903_GP1_INTMODE_SHIFT 1 /* GP1_INTMODE */
|
||||
#define WM8903_GP1_INTMODE_WIDTH 1 /* GP1_INTMODE */
|
||||
#define WM8903_GP1_DB 0x0001 /* GP1_DB */
|
||||
#define WM8903_GP1_DB_MASK 0x0001 /* GP1_DB */
|
||||
#define WM8903_GP1_DB_SHIFT 0 /* GP1_DB */
|
||||
#define WM8903_GP1_DB_WIDTH 1 /* GP1_DB */
|
||||
|
||||
/*
|
||||
* R117 (0x75) - GPIO Control 2
|
||||
*/
|
||||
#define WM8903_GP2_FN_MASK 0x1F00 /* GP2_FN - [12:8] */
|
||||
#define WM8903_GP2_FN_SHIFT 8 /* GP2_FN - [12:8] */
|
||||
#define WM8903_GP2_FN_WIDTH 5 /* GP2_FN - [12:8] */
|
||||
#define WM8903_GP2_DIR 0x0080 /* GP2_DIR */
|
||||
#define WM8903_GP2_DIR_MASK 0x0080 /* GP2_DIR */
|
||||
#define WM8903_GP2_DIR_SHIFT 7 /* GP2_DIR */
|
||||
#define WM8903_GP2_DIR_WIDTH 1 /* GP2_DIR */
|
||||
#define WM8903_GP2_OP_CFG 0x0040 /* GP2_OP_CFG */
|
||||
#define WM8903_GP2_OP_CFG_MASK 0x0040 /* GP2_OP_CFG */
|
||||
#define WM8903_GP2_OP_CFG_SHIFT 6 /* GP2_OP_CFG */
|
||||
#define WM8903_GP2_OP_CFG_WIDTH 1 /* GP2_OP_CFG */
|
||||
#define WM8903_GP2_IP_CFG 0x0020 /* GP2_IP_CFG */
|
||||
#define WM8903_GP2_IP_CFG_MASK 0x0020 /* GP2_IP_CFG */
|
||||
#define WM8903_GP2_IP_CFG_SHIFT 5 /* GP2_IP_CFG */
|
||||
#define WM8903_GP2_IP_CFG_WIDTH 1 /* GP2_IP_CFG */
|
||||
#define WM8903_GP2_LVL 0x0010 /* GP2_LVL */
|
||||
#define WM8903_GP2_LVL_MASK 0x0010 /* GP2_LVL */
|
||||
#define WM8903_GP2_LVL_SHIFT 4 /* GP2_LVL */
|
||||
#define WM8903_GP2_LVL_WIDTH 1 /* GP2_LVL */
|
||||
#define WM8903_GP2_PD 0x0008 /* GP2_PD */
|
||||
#define WM8903_GP2_PD_MASK 0x0008 /* GP2_PD */
|
||||
#define WM8903_GP2_PD_SHIFT 3 /* GP2_PD */
|
||||
#define WM8903_GP2_PD_WIDTH 1 /* GP2_PD */
|
||||
#define WM8903_GP2_PU 0x0004 /* GP2_PU */
|
||||
#define WM8903_GP2_PU_MASK 0x0004 /* GP2_PU */
|
||||
#define WM8903_GP2_PU_SHIFT 2 /* GP2_PU */
|
||||
#define WM8903_GP2_PU_WIDTH 1 /* GP2_PU */
|
||||
#define WM8903_GP2_INTMODE 0x0002 /* GP2_INTMODE */
|
||||
#define WM8903_GP2_INTMODE_MASK 0x0002 /* GP2_INTMODE */
|
||||
#define WM8903_GP2_INTMODE_SHIFT 1 /* GP2_INTMODE */
|
||||
#define WM8903_GP2_INTMODE_WIDTH 1 /* GP2_INTMODE */
|
||||
#define WM8903_GP2_DB 0x0001 /* GP2_DB */
|
||||
#define WM8903_GP2_DB_MASK 0x0001 /* GP2_DB */
|
||||
#define WM8903_GP2_DB_SHIFT 0 /* GP2_DB */
|
||||
#define WM8903_GP2_DB_WIDTH 1 /* GP2_DB */
|
||||
|
||||
/*
|
||||
* R118 (0x76) - GPIO Control 3
|
||||
*/
|
||||
#define WM8903_GP3_FN_MASK 0x1F00 /* GP3_FN - [12:8] */
|
||||
#define WM8903_GP3_FN_SHIFT 8 /* GP3_FN - [12:8] */
|
||||
#define WM8903_GP3_FN_WIDTH 5 /* GP3_FN - [12:8] */
|
||||
#define WM8903_GP3_DIR 0x0080 /* GP3_DIR */
|
||||
#define WM8903_GP3_DIR_MASK 0x0080 /* GP3_DIR */
|
||||
#define WM8903_GP3_DIR_SHIFT 7 /* GP3_DIR */
|
||||
#define WM8903_GP3_DIR_WIDTH 1 /* GP3_DIR */
|
||||
#define WM8903_GP3_OP_CFG 0x0040 /* GP3_OP_CFG */
|
||||
#define WM8903_GP3_OP_CFG_MASK 0x0040 /* GP3_OP_CFG */
|
||||
#define WM8903_GP3_OP_CFG_SHIFT 6 /* GP3_OP_CFG */
|
||||
#define WM8903_GP3_OP_CFG_WIDTH 1 /* GP3_OP_CFG */
|
||||
#define WM8903_GP3_IP_CFG 0x0020 /* GP3_IP_CFG */
|
||||
#define WM8903_GP3_IP_CFG_MASK 0x0020 /* GP3_IP_CFG */
|
||||
#define WM8903_GP3_IP_CFG_SHIFT 5 /* GP3_IP_CFG */
|
||||
#define WM8903_GP3_IP_CFG_WIDTH 1 /* GP3_IP_CFG */
|
||||
#define WM8903_GP3_LVL 0x0010 /* GP3_LVL */
|
||||
#define WM8903_GP3_LVL_MASK 0x0010 /* GP3_LVL */
|
||||
#define WM8903_GP3_LVL_SHIFT 4 /* GP3_LVL */
|
||||
#define WM8903_GP3_LVL_WIDTH 1 /* GP3_LVL */
|
||||
#define WM8903_GP3_PD 0x0008 /* GP3_PD */
|
||||
#define WM8903_GP3_PD_MASK 0x0008 /* GP3_PD */
|
||||
#define WM8903_GP3_PD_SHIFT 3 /* GP3_PD */
|
||||
#define WM8903_GP3_PD_WIDTH 1 /* GP3_PD */
|
||||
#define WM8903_GP3_PU 0x0004 /* GP3_PU */
|
||||
#define WM8903_GP3_PU_MASK 0x0004 /* GP3_PU */
|
||||
#define WM8903_GP3_PU_SHIFT 2 /* GP3_PU */
|
||||
#define WM8903_GP3_PU_WIDTH 1 /* GP3_PU */
|
||||
#define WM8903_GP3_INTMODE 0x0002 /* GP3_INTMODE */
|
||||
#define WM8903_GP3_INTMODE_MASK 0x0002 /* GP3_INTMODE */
|
||||
#define WM8903_GP3_INTMODE_SHIFT 1 /* GP3_INTMODE */
|
||||
#define WM8903_GP3_INTMODE_WIDTH 1 /* GP3_INTMODE */
|
||||
#define WM8903_GP3_DB 0x0001 /* GP3_DB */
|
||||
#define WM8903_GP3_DB_MASK 0x0001 /* GP3_DB */
|
||||
#define WM8903_GP3_DB_SHIFT 0 /* GP3_DB */
|
||||
#define WM8903_GP3_DB_WIDTH 1 /* GP3_DB */
|
||||
|
||||
/*
|
||||
* R119 (0x77) - GPIO Control 4
|
||||
*/
|
||||
#define WM8903_GP4_FN_MASK 0x1F00 /* GP4_FN - [12:8] */
|
||||
#define WM8903_GP4_FN_SHIFT 8 /* GP4_FN - [12:8] */
|
||||
#define WM8903_GP4_FN_WIDTH 5 /* GP4_FN - [12:8] */
|
||||
#define WM8903_GP4_DIR 0x0080 /* GP4_DIR */
|
||||
#define WM8903_GP4_DIR_MASK 0x0080 /* GP4_DIR */
|
||||
#define WM8903_GP4_DIR_SHIFT 7 /* GP4_DIR */
|
||||
#define WM8903_GP4_DIR_WIDTH 1 /* GP4_DIR */
|
||||
#define WM8903_GP4_OP_CFG 0x0040 /* GP4_OP_CFG */
|
||||
#define WM8903_GP4_OP_CFG_MASK 0x0040 /* GP4_OP_CFG */
|
||||
#define WM8903_GP4_OP_CFG_SHIFT 6 /* GP4_OP_CFG */
|
||||
#define WM8903_GP4_OP_CFG_WIDTH 1 /* GP4_OP_CFG */
|
||||
#define WM8903_GP4_IP_CFG 0x0020 /* GP4_IP_CFG */
|
||||
#define WM8903_GP4_IP_CFG_MASK 0x0020 /* GP4_IP_CFG */
|
||||
#define WM8903_GP4_IP_CFG_SHIFT 5 /* GP4_IP_CFG */
|
||||
#define WM8903_GP4_IP_CFG_WIDTH 1 /* GP4_IP_CFG */
|
||||
#define WM8903_GP4_LVL 0x0010 /* GP4_LVL */
|
||||
#define WM8903_GP4_LVL_MASK 0x0010 /* GP4_LVL */
|
||||
#define WM8903_GP4_LVL_SHIFT 4 /* GP4_LVL */
|
||||
#define WM8903_GP4_LVL_WIDTH 1 /* GP4_LVL */
|
||||
#define WM8903_GP4_PD 0x0008 /* GP4_PD */
|
||||
#define WM8903_GP4_PD_MASK 0x0008 /* GP4_PD */
|
||||
#define WM8903_GP4_PD_SHIFT 3 /* GP4_PD */
|
||||
#define WM8903_GP4_PD_WIDTH 1 /* GP4_PD */
|
||||
#define WM8903_GP4_PU 0x0004 /* GP4_PU */
|
||||
#define WM8903_GP4_PU_MASK 0x0004 /* GP4_PU */
|
||||
#define WM8903_GP4_PU_SHIFT 2 /* GP4_PU */
|
||||
#define WM8903_GP4_PU_WIDTH 1 /* GP4_PU */
|
||||
#define WM8903_GP4_INTMODE 0x0002 /* GP4_INTMODE */
|
||||
#define WM8903_GP4_INTMODE_MASK 0x0002 /* GP4_INTMODE */
|
||||
#define WM8903_GP4_INTMODE_SHIFT 1 /* GP4_INTMODE */
|
||||
#define WM8903_GP4_INTMODE_WIDTH 1 /* GP4_INTMODE */
|
||||
#define WM8903_GP4_DB 0x0001 /* GP4_DB */
|
||||
#define WM8903_GP4_DB_MASK 0x0001 /* GP4_DB */
|
||||
#define WM8903_GP4_DB_SHIFT 0 /* GP4_DB */
|
||||
#define WM8903_GP4_DB_WIDTH 1 /* GP4_DB */
|
||||
|
||||
/*
|
||||
* R120 (0x78) - GPIO Control 5
|
||||
*/
|
||||
#define WM8903_GP5_FN_MASK 0x1F00 /* GP5_FN - [12:8] */
|
||||
#define WM8903_GP5_FN_SHIFT 8 /* GP5_FN - [12:8] */
|
||||
#define WM8903_GP5_FN_WIDTH 5 /* GP5_FN - [12:8] */
|
||||
#define WM8903_GP5_DIR 0x0080 /* GP5_DIR */
|
||||
#define WM8903_GP5_DIR_MASK 0x0080 /* GP5_DIR */
|
||||
#define WM8903_GP5_DIR_SHIFT 7 /* GP5_DIR */
|
||||
#define WM8903_GP5_DIR_WIDTH 1 /* GP5_DIR */
|
||||
#define WM8903_GP5_OP_CFG 0x0040 /* GP5_OP_CFG */
|
||||
#define WM8903_GP5_OP_CFG_MASK 0x0040 /* GP5_OP_CFG */
|
||||
#define WM8903_GP5_OP_CFG_SHIFT 6 /* GP5_OP_CFG */
|
||||
#define WM8903_GP5_OP_CFG_WIDTH 1 /* GP5_OP_CFG */
|
||||
#define WM8903_GP5_IP_CFG 0x0020 /* GP5_IP_CFG */
|
||||
#define WM8903_GP5_IP_CFG_MASK 0x0020 /* GP5_IP_CFG */
|
||||
#define WM8903_GP5_IP_CFG_SHIFT 5 /* GP5_IP_CFG */
|
||||
#define WM8903_GP5_IP_CFG_WIDTH 1 /* GP5_IP_CFG */
|
||||
#define WM8903_GP5_LVL 0x0010 /* GP5_LVL */
|
||||
#define WM8903_GP5_LVL_MASK 0x0010 /* GP5_LVL */
|
||||
#define WM8903_GP5_LVL_SHIFT 4 /* GP5_LVL */
|
||||
#define WM8903_GP5_LVL_WIDTH 1 /* GP5_LVL */
|
||||
#define WM8903_GP5_PD 0x0008 /* GP5_PD */
|
||||
#define WM8903_GP5_PD_MASK 0x0008 /* GP5_PD */
|
||||
#define WM8903_GP5_PD_SHIFT 3 /* GP5_PD */
|
||||
#define WM8903_GP5_PD_WIDTH 1 /* GP5_PD */
|
||||
#define WM8903_GP5_PU 0x0004 /* GP5_PU */
|
||||
#define WM8903_GP5_PU_MASK 0x0004 /* GP5_PU */
|
||||
#define WM8903_GP5_PU_SHIFT 2 /* GP5_PU */
|
||||
#define WM8903_GP5_PU_WIDTH 1 /* GP5_PU */
|
||||
#define WM8903_GP5_INTMODE 0x0002 /* GP5_INTMODE */
|
||||
#define WM8903_GP5_INTMODE_MASK 0x0002 /* GP5_INTMODE */
|
||||
#define WM8903_GP5_INTMODE_SHIFT 1 /* GP5_INTMODE */
|
||||
#define WM8903_GP5_INTMODE_WIDTH 1 /* GP5_INTMODE */
|
||||
#define WM8903_GP5_DB 0x0001 /* GP5_DB */
|
||||
#define WM8903_GP5_DB_MASK 0x0001 /* GP5_DB */
|
||||
#define WM8903_GP5_DB_SHIFT 0 /* GP5_DB */
|
||||
#define WM8903_GP5_DB_WIDTH 1 /* GP5_DB */
|
||||
|
||||
struct wm8903_platform_data {
|
||||
bool irq_active_low; /* Set if IRQ active low, default high */
|
||||
|
||||
/* Default register value for R6 (Mic bias), used to configure
|
||||
* microphone detection. In conjunction with gpio_cfg this
|
||||
* can be used to route the microphone status signals out onto
|
||||
* the GPIOs for use with snd_soc_jack_add_gpios().
|
||||
*/
|
||||
u16 micdet_cfg;
|
||||
|
||||
int micdet_delay; /* Delay after microphone detection (ms) */
|
||||
|
||||
u32 gpio_cfg[5]; /* Default register values for GPIO pin mux */
|
||||
};
|
||||
|
||||
#endif
|
@@ -15,8 +15,111 @@
|
||||
#ifndef __MFD_WM8994_PDATA_H__
|
||||
#define __MFD_WM8994_PDATA_H__
|
||||
|
||||
#define WM8904_DRC_REGS 4
|
||||
#define WM8904_EQ_REGS 25
|
||||
/* Used to enable configuration of a GPIO to all zeros */
|
||||
#define WM8904_GPIO_NO_CONFIG 0x8000
|
||||
|
||||
/*
|
||||
* R6 (0x06) - Mic Bias Control 0
|
||||
*/
|
||||
#define WM8904_MICDET_THR_MASK 0x0070 /* MICDET_THR - [6:4] */
|
||||
#define WM8904_MICDET_THR_SHIFT 4 /* MICDET_THR - [6:4] */
|
||||
#define WM8904_MICDET_THR_WIDTH 3 /* MICDET_THR - [6:4] */
|
||||
#define WM8904_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */
|
||||
#define WM8904_MICSHORT_THR_SHIFT 2 /* MICSHORT_THR - [3:2] */
|
||||
#define WM8904_MICSHORT_THR_WIDTH 2 /* MICSHORT_THR - [3:2] */
|
||||
#define WM8904_MICDET_ENA 0x0002 /* MICDET_ENA */
|
||||
#define WM8904_MICDET_ENA_MASK 0x0002 /* MICDET_ENA */
|
||||
#define WM8904_MICDET_ENA_SHIFT 1 /* MICDET_ENA */
|
||||
#define WM8904_MICDET_ENA_WIDTH 1 /* MICDET_ENA */
|
||||
#define WM8904_MICBIAS_ENA 0x0001 /* MICBIAS_ENA */
|
||||
#define WM8904_MICBIAS_ENA_MASK 0x0001 /* MICBIAS_ENA */
|
||||
#define WM8904_MICBIAS_ENA_SHIFT 0 /* MICBIAS_ENA */
|
||||
#define WM8904_MICBIAS_ENA_WIDTH 1 /* MICBIAS_ENA */
|
||||
|
||||
/*
|
||||
* R7 (0x07) - Mic Bias Control 1
|
||||
*/
|
||||
#define WM8904_MIC_DET_FILTER_ENA 0x8000 /* MIC_DET_FILTER_ENA */
|
||||
#define WM8904_MIC_DET_FILTER_ENA_MASK 0x8000 /* MIC_DET_FILTER_ENA */
|
||||
#define WM8904_MIC_DET_FILTER_ENA_SHIFT 15 /* MIC_DET_FILTER_ENA */
|
||||
#define WM8904_MIC_DET_FILTER_ENA_WIDTH 1 /* MIC_DET_FILTER_ENA */
|
||||
#define WM8904_MIC_SHORT_FILTER_ENA 0x4000 /* MIC_SHORT_FILTER_ENA */
|
||||
#define WM8904_MIC_SHORT_FILTER_ENA_MASK 0x4000 /* MIC_SHORT_FILTER_ENA */
|
||||
#define WM8904_MIC_SHORT_FILTER_ENA_SHIFT 14 /* MIC_SHORT_FILTER_ENA */
|
||||
#define WM8904_MIC_SHORT_FILTER_ENA_WIDTH 1 /* MIC_SHORT_FILTER_ENA */
|
||||
#define WM8904_MICBIAS_SEL_MASK 0x0007 /* MICBIAS_SEL - [2:0] */
|
||||
#define WM8904_MICBIAS_SEL_SHIFT 0 /* MICBIAS_SEL - [2:0] */
|
||||
#define WM8904_MICBIAS_SEL_WIDTH 3 /* MICBIAS_SEL - [2:0] */
|
||||
|
||||
|
||||
/*
|
||||
* R121 (0x79) - GPIO Control 1
|
||||
*/
|
||||
#define WM8904_GPIO1_PU 0x0020 /* GPIO1_PU */
|
||||
#define WM8904_GPIO1_PU_MASK 0x0020 /* GPIO1_PU */
|
||||
#define WM8904_GPIO1_PU_SHIFT 5 /* GPIO1_PU */
|
||||
#define WM8904_GPIO1_PU_WIDTH 1 /* GPIO1_PU */
|
||||
#define WM8904_GPIO1_PD 0x0010 /* GPIO1_PD */
|
||||
#define WM8904_GPIO1_PD_MASK 0x0010 /* GPIO1_PD */
|
||||
#define WM8904_GPIO1_PD_SHIFT 4 /* GPIO1_PD */
|
||||
#define WM8904_GPIO1_PD_WIDTH 1 /* GPIO1_PD */
|
||||
#define WM8904_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */
|
||||
#define WM8904_GPIO1_SEL_SHIFT 0 /* GPIO1_SEL - [3:0] */
|
||||
#define WM8904_GPIO1_SEL_WIDTH 4 /* GPIO1_SEL - [3:0] */
|
||||
|
||||
/*
|
||||
* R122 (0x7A) - GPIO Control 2
|
||||
*/
|
||||
#define WM8904_GPIO2_PU 0x0020 /* GPIO2_PU */
|
||||
#define WM8904_GPIO2_PU_MASK 0x0020 /* GPIO2_PU */
|
||||
#define WM8904_GPIO2_PU_SHIFT 5 /* GPIO2_PU */
|
||||
#define WM8904_GPIO2_PU_WIDTH 1 /* GPIO2_PU */
|
||||
#define WM8904_GPIO2_PD 0x0010 /* GPIO2_PD */
|
||||
#define WM8904_GPIO2_PD_MASK 0x0010 /* GPIO2_PD */
|
||||
#define WM8904_GPIO2_PD_SHIFT 4 /* GPIO2_PD */
|
||||
#define WM8904_GPIO2_PD_WIDTH 1 /* GPIO2_PD */
|
||||
#define WM8904_GPIO2_SEL_MASK 0x000F /* GPIO2_SEL - [3:0] */
|
||||
#define WM8904_GPIO2_SEL_SHIFT 0 /* GPIO2_SEL - [3:0] */
|
||||
#define WM8904_GPIO2_SEL_WIDTH 4 /* GPIO2_SEL - [3:0] */
|
||||
|
||||
/*
|
||||
* R123 (0x7B) - GPIO Control 3
|
||||
*/
|
||||
#define WM8904_GPIO3_PU 0x0020 /* GPIO3_PU */
|
||||
#define WM8904_GPIO3_PU_MASK 0x0020 /* GPIO3_PU */
|
||||
#define WM8904_GPIO3_PU_SHIFT 5 /* GPIO3_PU */
|
||||
#define WM8904_GPIO3_PU_WIDTH 1 /* GPIO3_PU */
|
||||
#define WM8904_GPIO3_PD 0x0010 /* GPIO3_PD */
|
||||
#define WM8904_GPIO3_PD_MASK 0x0010 /* GPIO3_PD */
|
||||
#define WM8904_GPIO3_PD_SHIFT 4 /* GPIO3_PD */
|
||||
#define WM8904_GPIO3_PD_WIDTH 1 /* GPIO3_PD */
|
||||
#define WM8904_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */
|
||||
#define WM8904_GPIO3_SEL_SHIFT 0 /* GPIO3_SEL - [3:0] */
|
||||
#define WM8904_GPIO3_SEL_WIDTH 4 /* GPIO3_SEL - [3:0] */
|
||||
|
||||
/*
|
||||
* R124 (0x7C) - GPIO Control 4
|
||||
*/
|
||||
#define WM8904_GPI7_ENA 0x0200 /* GPI7_ENA */
|
||||
#define WM8904_GPI7_ENA_MASK 0x0200 /* GPI7_ENA */
|
||||
#define WM8904_GPI7_ENA_SHIFT 9 /* GPI7_ENA */
|
||||
#define WM8904_GPI7_ENA_WIDTH 1 /* GPI7_ENA */
|
||||
#define WM8904_GPI8_ENA 0x0100 /* GPI8_ENA */
|
||||
#define WM8904_GPI8_ENA_MASK 0x0100 /* GPI8_ENA */
|
||||
#define WM8904_GPI8_ENA_SHIFT 8 /* GPI8_ENA */
|
||||
#define WM8904_GPI8_ENA_WIDTH 1 /* GPI8_ENA */
|
||||
#define WM8904_GPIO_BCLK_MODE_ENA 0x0080 /* GPIO_BCLK_MODE_ENA */
|
||||
#define WM8904_GPIO_BCLK_MODE_ENA_MASK 0x0080 /* GPIO_BCLK_MODE_ENA */
|
||||
#define WM8904_GPIO_BCLK_MODE_ENA_SHIFT 7 /* GPIO_BCLK_MODE_ENA */
|
||||
#define WM8904_GPIO_BCLK_MODE_ENA_WIDTH 1 /* GPIO_BCLK_MODE_ENA */
|
||||
#define WM8904_GPIO_BCLK_SEL_MASK 0x000F /* GPIO_BCLK_SEL - [3:0] */
|
||||
#define WM8904_GPIO_BCLK_SEL_SHIFT 0 /* GPIO_BCLK_SEL - [3:0] */
|
||||
#define WM8904_GPIO_BCLK_SEL_WIDTH 4 /* GPIO_BCLK_SEL - [3:0] */
|
||||
|
||||
#define WM8904_MIC_REGS 2
|
||||
#define WM8904_GPIO_REGS 4
|
||||
#define WM8904_DRC_REGS 4
|
||||
#define WM8904_EQ_REGS 25
|
||||
|
||||
/**
|
||||
* DRC configurations are specified with a label and a set of register
|
||||
@@ -52,6 +155,9 @@ struct wm8904_pdata {
|
||||
|
||||
int num_retune_mobile_cfgs;
|
||||
struct wm8904_retune_mobile_cfg *retune_mobile_cfgs;
|
||||
|
||||
u32 gpio_cfg[WM8904_GPIO_REGS];
|
||||
u32 mic_cfg[WM8904_MIC_REGS];
|
||||
};
|
||||
|
||||
#endif
|
||||
|
24
include/sound/wm8960.h
Normal file
24
include/sound/wm8960.h
Normal file
@@ -0,0 +1,24 @@
|
||||
/*
|
||||
* wm8960.h -- WM8960 Soc Audio driver platform data
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef _WM8960_PDATA_H
|
||||
#define _WM8960_PDATA_H
|
||||
|
||||
#define WM8960_DRES_400R 0
|
||||
#define WM8960_DRES_200R 1
|
||||
#define WM8960_DRES_600R 2
|
||||
#define WM8960_DRES_150R 3
|
||||
#define WM8960_DRES_MAX 3
|
||||
|
||||
struct wm8960_data {
|
||||
bool capless; /* Headphone outputs configured in capless mode */
|
||||
|
||||
int dres; /* Discharge resistance for headphone outputs */
|
||||
};
|
||||
|
||||
#endif
|
28
include/sound/wm9090.h
Normal file
28
include/sound/wm9090.h
Normal file
@@ -0,0 +1,28 @@
|
||||
/*
|
||||
* linux/sound/wm9090.h -- Platform data for WM9090
|
||||
*
|
||||
* Copyright 2009, 2010 Wolfson Microelectronics. PLC.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_SND_WM9090_H
|
||||
#define __LINUX_SND_WM9090_H
|
||||
|
||||
struct wm9090_platform_data {
|
||||
/* Line inputs 1 & 2 can optionally be differential */
|
||||
unsigned int lin1_diff:1;
|
||||
unsigned int lin2_diff:1;
|
||||
|
||||
/* AGC configuration. This is intended to protect the speaker
|
||||
* against overdriving and will therefore depend on the
|
||||
* hardware setup with incorrect runtime configuration
|
||||
* potentially causing hardware damage.
|
||||
*/
|
||||
unsigned int agc_ena:1;
|
||||
u16 agc[3];
|
||||
};
|
||||
|
||||
#endif
|
Reference in New Issue
Block a user