Merge branch 'pfc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/sh-pinmux
From Simon Horman. Based on agreement between me, Paul Mundt, Linus Walleij and Simon, we're mergning this large branch of pinctrl conversion through arm-soc, even though it contains the corresponding conversions for arch/sh. Main reason for this is tight dependencies (that will now mostly be broken) between the arch/sh and mach-shmobile implementations. There will be more of this in 3.10 to do device-tree bindings, but this is the initial conversion. * 'pfc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (80 commits) sh-pfc: Move sh_pfc.h from include/linux/ to driver directory sh-pfc: Remove pinmux_info definition sh: Remove unused sh_pfc_register_info() function sh: shx3: pinmux: Use driver-provided pinmux info sh: sh7786: pinmux: Use driver-provided pinmux info sh: sh7785: pinmux: Use driver-provided pinmux info sh: sh7757: pinmux: Use driver-provided pinmux info sh: sh7734: pinmux: Use driver-provided pinmux info sh: sh7724: pinmux: Use driver-provided pinmux info sh: sh7723: pinmux: Use driver-provided pinmux info sh: sh7722: pinmux: Use driver-provided pinmux info sh: sh7720: pinmux: Use driver-provided pinmux info sh: sh7269: pinmux: Use driver-provided pinmux info sh: sh7264: pinmux: Use driver-provided pinmux info sh: sh7203: pinmux: Use driver-provided pinmux info ARM: shmobile: sh73a0: Use driver-provided pinmux info ARM: shmobile: sh7372: Use driver-provided pinmux info ARM: shmobile: r8a7779: Use driver-provided pinmux info ARM: shmobile: r8a7740: Use driver-provided pinmux info sh-pfc: Add shx3 pinmux support ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
@@ -1,236 +0,0 @@
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/*
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* SuperH Pin Function Controller Support
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*
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* Copyright (c) 2008 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __SH_PFC_H
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#define __SH_PFC_H
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#include <linux/stringify.h>
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#include <asm-generic/gpio.h>
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typedef unsigned short pinmux_enum_t;
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typedef unsigned short pinmux_flag_t;
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enum {
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PINMUX_TYPE_NONE,
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PINMUX_TYPE_FUNCTION,
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PINMUX_TYPE_GPIO,
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PINMUX_TYPE_OUTPUT,
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PINMUX_TYPE_INPUT,
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PINMUX_TYPE_INPUT_PULLUP,
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PINMUX_TYPE_INPUT_PULLDOWN,
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PINMUX_FLAG_TYPE, /* must be last */
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};
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#define PINMUX_FLAG_DBIT_SHIFT 5
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#define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
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#define PINMUX_FLAG_DREG_SHIFT 10
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#define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
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struct pinmux_gpio {
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pinmux_enum_t enum_id;
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pinmux_flag_t flags;
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const char *name;
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};
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#define PINMUX_GPIO(gpio, data_or_mark) \
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[gpio] = { .name = __stringify(gpio), .enum_id = data_or_mark, .flags = PINMUX_TYPE_NONE }
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#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
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struct pinmux_cfg_reg {
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unsigned long reg, reg_width, field_width;
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unsigned long *cnt;
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pinmux_enum_t *enum_ids;
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unsigned long *var_field_width;
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};
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#define PINMUX_CFG_REG(name, r, r_width, f_width) \
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.reg = r, .reg_width = r_width, .field_width = f_width, \
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.cnt = (unsigned long [r_width / f_width]) {}, \
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.enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
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#define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
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.reg = r, .reg_width = r_width, \
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.cnt = (unsigned long [r_width]) {}, \
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.var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
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.enum_ids = (pinmux_enum_t [])
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struct pinmux_data_reg {
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unsigned long reg, reg_width, reg_shadow;
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pinmux_enum_t *enum_ids;
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void __iomem *mapped_reg;
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};
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#define PINMUX_DATA_REG(name, r, r_width) \
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.reg = r, .reg_width = r_width, \
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.enum_ids = (pinmux_enum_t [r_width]) \
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struct pinmux_irq {
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int irq;
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pinmux_enum_t *enum_ids;
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};
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#define PINMUX_IRQ(irq_nr, ids...) \
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{ .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \
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struct pinmux_range {
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pinmux_enum_t begin;
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pinmux_enum_t end;
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pinmux_enum_t force;
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};
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struct pfc_window {
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phys_addr_t phys;
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void __iomem *virt;
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unsigned long size;
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};
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struct sh_pfc {
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char *name;
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pinmux_enum_t reserved_id;
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struct pinmux_range data;
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struct pinmux_range input;
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struct pinmux_range input_pd;
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struct pinmux_range input_pu;
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struct pinmux_range output;
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struct pinmux_range mark;
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struct pinmux_range function;
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unsigned first_gpio, last_gpio;
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struct pinmux_gpio *gpios;
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struct pinmux_cfg_reg *cfg_regs;
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struct pinmux_data_reg *data_regs;
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pinmux_enum_t *gpio_data;
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unsigned int gpio_data_size;
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struct pinmux_irq *gpio_irq;
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unsigned int gpio_irq_size;
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spinlock_t lock;
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struct resource *resource;
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unsigned int num_resources;
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struct pfc_window *window;
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unsigned long unlock_reg;
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};
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/* XXX compat for now */
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#define pinmux_info sh_pfc
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/* drivers/sh/pfc/gpio.c */
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int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
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/* drivers/sh/pfc/pinctrl.c */
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int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
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/* drivers/sh/pfc/core.c */
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int register_sh_pfc(struct sh_pfc *pfc);
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int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos);
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void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
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unsigned long value);
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int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
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struct pinmux_data_reg **drp, int *bitp);
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int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
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pinmux_enum_t *enum_idp);
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int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
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int cfg_mode);
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/* xxx */
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static inline int register_pinmux(struct pinmux_info *pip)
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{
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struct sh_pfc *pfc = pip;
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return register_sh_pfc(pfc);
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}
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enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
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/* helper macro for port */
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#define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
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#define PORT_10(fn, pfx, sfx) \
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PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
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PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
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PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
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PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
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PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
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#define PORT_90(fn, pfx, sfx) \
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PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
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PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
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PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
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PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
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PORT_10(fn, pfx##9, sfx)
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#define _PORT_ALL(pfx, sfx) pfx##_##sfx
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#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
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#define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
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#define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
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#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
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/* helper macro for pinmux_enum_t */
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#define PORT_DATA_I(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
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#define PORT_DATA_I_PD(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
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PORT##nr##_IN, PORT##nr##_IN_PD)
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#define PORT_DATA_I_PU(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
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PORT##nr##_IN, PORT##nr##_IN_PU)
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#define PORT_DATA_I_PU_PD(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
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PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
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#define PORT_DATA_O(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
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#define PORT_DATA_IO(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
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PORT##nr##_IN)
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#define PORT_DATA_IO_PD(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
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PORT##nr##_IN, PORT##nr##_IN_PD)
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#define PORT_DATA_IO_PU(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
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PORT##nr##_IN, PORT##nr##_IN_PU)
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#define PORT_DATA_IO_PU_PD(nr) \
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PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
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PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
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/* helper macro for top 4 bits in PORTnCR */
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#define _PCRH(in, in_pd, in_pu, out) \
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0, (out), (in), 0, \
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0, 0, 0, 0, \
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0, 0, (in_pd), 0, \
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0, 0, (in_pu), 0
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#define PORTCR(nr, reg) \
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{ \
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PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
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_PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
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PORT##nr##_IN_PU, PORT##nr##_OUT), \
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PORT##nr##_FN0, PORT##nr##_FN1, \
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PORT##nr##_FN2, PORT##nr##_FN3, \
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PORT##nr##_FN4, PORT##nr##_FN5, \
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PORT##nr##_FN6, PORT##nr##_FN7 } \
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}
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#endif /* __SH_PFC_H */
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