mfd: ti_am335x_tscadc: Don't read back REG_SE
The purpose of reg_se_cache has been defeated. It should avoid the read-back of the register to avoid the latency and the fact that the bits are reset to 0 after the individual conversation took place. The reason why this is required like this to work, is that read-back of the register removes the bits of the ADC so they do not start another conversation after the register is re-written from the TSC side for the update. To avoid the not required read-back I introduce a "set once" variant which does not update the cache mask. After the conversation completes, the bit is removed from the SE register anyway and we don't plan a new conversation "any time soon". The current set function is renamed to set_cache to distinguish the two operations. This is a small preparation for a larger sync-rework. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Lee Jones

parent
3466bd2273
commit
7e170c6e4f
@@ -198,7 +198,7 @@ static void titsc_step_config(struct titsc *ts_dev)
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/* The steps1 … end and bit 0 for TS_Charge */
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stepenable = (1 << (end_step + 2)) - 1;
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ts_dev->step_mask = stepenable;
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am335x_tsc_se_set(ts_dev->mfd_tscadc, ts_dev->step_mask);
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am335x_tsc_se_set_cache(ts_dev->mfd_tscadc, ts_dev->step_mask);
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}
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static void titsc_read_coordinates(struct titsc *ts_dev,
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@@ -322,7 +322,7 @@ static irqreturn_t titsc_irq(int irq, void *dev)
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if (irqclr) {
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titsc_writel(ts_dev, REG_IRQSTATUS, irqclr);
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am335x_tsc_se_set(ts_dev->mfd_tscadc, ts_dev->step_mask);
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am335x_tsc_se_set_cache(ts_dev->mfd_tscadc, ts_dev->step_mask);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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