clk: lpc32xx: add HCLK PLL output configuration
This patch add the support to setup the HCLK PLL output using the "assigned-clock-rates" parameter in the device tree. If the option is not use, the clock setup by the kickstart and/or bootloader remain unchanged. The previous kernel version did not change the clock frequency output setup by the kickstart and/or bootloader; this version always setup the clock frequency output to 208MHz. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:

committed by
Stephen Boyd

parent
58bb621536
commit
7e0810c948
@@ -47,6 +47,7 @@
|
||||
#define LPC32XX_CLK_PWM1 32
|
||||
#define LPC32XX_CLK_PWM2 33
|
||||
#define LPC32XX_CLK_ADC 34
|
||||
#define LPC32XX_CLK_HCLK_PLL 35
|
||||
|
||||
/* LPC32XX USB clocks */
|
||||
#define LPC32XX_USB_CLK_I2C 1
|
||||
|
Reference in New Issue
Block a user