ARM: v6k: select clear exclusive code seqences according to V6 variants
If CONFIG_CPU_V6 is enabled, then the kernel must support ARMv6 CPUs which don't have the V6K extensions implemented. Always use the dummy store-exclusive method to ensure that the exclusive monitors are cleared. If CONFIG_CPU_V6 is not set, but CONFIG_CPU_32v6K is enabled, then we have the K extensions available on all CPUs we're building support for, so we can use the new clear-exclusive instruction. Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@@ -76,13 +76,13 @@
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#ifndef CONFIG_THUMB2_KERNEL
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.macro svc_exit, rpsr
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msr spsr_cxsf, \rpsr
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#if defined(CONFIG_CPU_32v6K)
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clrex @ clear the exclusive monitor
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ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
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#elif defined (CONFIG_CPU_V6)
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#if defined(CONFIG_CPU_V6)
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ldr r0, [sp]
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strex r1, r2, [sp] @ clear the exclusive monitor
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ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr
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#elif defined(CONFIG_CPU_32v6K)
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clrex @ clear the exclusive monitor
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ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
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#else
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ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
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#endif
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@@ -92,10 +92,10 @@
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ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
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ldr lr, [sp, #\offset + S_PC]! @ get pc
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msr spsr_cxsf, r1 @ save in spsr_svc
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#if defined(CONFIG_CPU_32v6K)
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clrex @ clear the exclusive monitor
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#elif defined (CONFIG_CPU_V6)
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#if defined(CONFIG_CPU_V6)
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strex r1, r2, [sp] @ clear the exclusive monitor
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#elif defined(CONFIG_CPU_32v6K)
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clrex @ clear the exclusive monitor
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#endif
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.if \fast
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ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
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