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x86, tsc: Add static (MSR) TSC calibration on Intel Atom SoCs

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On SoCs that have the calibration MSRs available, either there is no
PIT, HPET or PMTIMER to calibrate against, or the PIT/HPET/PMTIMER is
driven from the same clock as the TSC, so calibration is redundant and
just slows down the boot.

TSC rate is caculated by this formula:
<maximum core-clock to bus-clock ratio> * <maximum resolved frequency>
The ratio and the resolved frequency ID can be obtained from MSR.
See Intel 64 and IA-32 System Programming Guid section 16.12 and 30.11.5
for details.

Signed-off-by: Bin Gao <bin.gao@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/n/tip-rgm7xmg7k6qnjlw3ynkcjsmh@git.kernel.org
This commit is contained in:
Bin Gao
2013-10-21 09:16:33 -07:00
committed by H. Peter Anvin
parent 4618441536
commit 7da7c15613
4 changed files with 139 additions and 1 deletions
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10
arch/x86/kernel/tsc.c
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@@ -419,6 +419,16 @@ unsigned long native_calibrate_tsc(void)
unsigned long flags, latch, ms, fast_calibrate;
int hpet = is_hpet_enabled(), i, loopmin;
/* Calibrate TSC using MSR for Intel Atom SoCs */
local_irq_save(flags);
i = try_msr_calibrate_tsc(&fast_calibrate);
local_irq_restore(flags);
if (i >= 0) {
if (i == 0)
pr_warn("Fast TSC calibration using MSR failed\n");
return fast_calibrate;
}
local_irq_save(flags);
fast_calibrate = quick_pit_calibrate();
local_irq_restore(flags);