IB/mlx5: Add MR cache for large UMR regions
In this change we turn mlx5_ib_update_mtt() into generic mlx5_ib_update_xlt() to perfrom HCA translation table modifiactions supporting both atomic and process contexts and not limited by number of modified entries. Using this function we increase preallocated MRs up to 16GB. Signed-off-by: Artemy Kovalyov <artemyko@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
此提交包含在:
@@ -1112,11 +1112,18 @@ static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
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context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range;
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#endif
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context->upd_xlt_page = __get_free_page(GFP_KERNEL);
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if (!context->upd_xlt_page) {
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err = -ENOMEM;
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goto out_uars;
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}
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mutex_init(&context->upd_xlt_page_mutex);
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if (MLX5_CAP_GEN(dev->mdev, log_max_transport_domain)) {
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err = mlx5_core_alloc_transport_domain(dev->mdev,
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&context->tdn);
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if (err)
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goto out_uars;
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goto out_page;
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}
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INIT_LIST_HEAD(&context->vma_private_list);
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@@ -1168,6 +1175,9 @@ out_td:
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if (MLX5_CAP_GEN(dev->mdev, log_max_transport_domain))
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mlx5_core_dealloc_transport_domain(dev->mdev, context->tdn);
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out_page:
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free_page(context->upd_xlt_page);
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out_uars:
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for (i--; i >= 0; i--)
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mlx5_cmd_free_uar(dev->mdev, uars[i].index);
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@@ -1195,6 +1205,8 @@ static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
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if (MLX5_CAP_GEN(dev->mdev, log_max_transport_domain))
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mlx5_core_dealloc_transport_domain(dev->mdev, context->tdn);
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free_page(context->upd_xlt_page);
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for (i = 0; i < uuari->num_uars; i++) {
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if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index))
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mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index);
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