Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (236 commits) [ARM] 5300/1: fixup spitz reset during boot [ARM] 5295/1: make ZONE_DMA optional [ARM] 5239/1: Palm Zire 72 power management support [ARM] 5298/1: Drop desc_handle_irq() [ARM] 5297/1: [KS8695] Fix two compile-time warnings [ARM] 5296/1: [KS8695] Replace macro's with trailing underscores. [ARM] pxa: allow multi-machine PCMCIA builds [ARM] pxa: add preliminary CPUFREQ support for PXA3xx [ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.h [ARM] pxa: rename cpu-pxa.c to cpufreq-pxa2xx.c [ARM] pxa/zylonite: add support for USB OHCI [ARM] ohci-pxa27x: use ioremap() and offset for register access [ARM] ohci-pxa27x: introduce pxa27x_clear_otgph() [ARM] ohci-pxa27x: use platform_get_{irq,resource} for the resource [ARM] ohci-pxa27x: move OHCI controller specific registers into the driver [ARM] ohci-pxa27x: introduce flags to avoid direct access to OHCI registers [ARM] pxa: move I2S register and bit definitions into pxa2xx-i2s.c [ARM] pxa: simplify DMA register definitions [ARM] pxa: make additional DCSR bits valid for PXA3xx [ARM] pxa: move i2c register and bit definitions into i2c-pxa.c ... Fixed up conflicts in arch/arm/mach-versatile/core.c sound/soc/pxa/pxa2xx-ac97.c sound/soc/pxa/pxa2xx-i2s.c manually.
这个提交包含在:
@@ -95,19 +95,19 @@ static int __init badge4_sa1111_init(void)
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* One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
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*/
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static struct mtd_partition badge4_partitions[] = {
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{
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.name = "BLOB boot loader",
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.offset = 0,
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.size = 0x0000A000
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}, {
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = 0x00006000
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}, {
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.name = "root",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL
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}
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{
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.name = "BLOB boot loader",
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.offset = 0,
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.size = 0x0000A000
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}, {
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = 0x00006000
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}, {
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.name = "root",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL
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}
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};
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static struct flash_platform_data badge4_flash_data = {
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@@ -126,7 +126,7 @@ static int five_v_on __initdata = 0;
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static int __init five_v_on_setup(char *ignore)
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{
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five_v_on = 1;
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five_v_on = 1;
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return 1;
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}
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__setup("five_v_on", five_v_on_setup);
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@@ -171,15 +171,15 @@ static int __init badge4_init(void)
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GPCR = BADGE4_GPIO_TESTPT_J7;
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GPDR |= BADGE4_GPIO_TESTPT_J7;
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/* 5V supply rail. */
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GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
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GPDR |= BADGE4_GPIO_PCMEN5V;
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/* 5V supply rail. */
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GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
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GPDR |= BADGE4_GPIO_PCMEN5V;
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/* CPLD sdram type inputs; set up by blob */
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//GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
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printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
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!!(GPLR & BADGE4_GPIO_SDTYP1),
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!!(GPLR & BADGE4_GPIO_SDTYP0));
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!!(GPLR & BADGE4_GPIO_SDTYP1),
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!!(GPLR & BADGE4_GPIO_SDTYP0));
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/* SA1111 reset pin; set up by blob */
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//GPSR = BADGE4_GPIO_SA1111_NRST;
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@@ -205,8 +205,8 @@ static int __init badge4_init(void)
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ret = badge4_sa1111_init();
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if (ret < 0)
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printk(KERN_ERR
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"%s: SA-1111 initialization failed (%d)\n",
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__func__, ret);
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"%s: SA-1111 initialization failed (%d)\n",
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__func__, ret);
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/* maybe turn on 5v0 from the start */
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@@ -254,7 +254,7 @@ EXPORT_SYMBOL(badge4_set_5V);
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static struct map_desc badge4_io_desc[] __initdata = {
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{ /* SRAM bank 1 */
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{ /* SRAM bank 1 */
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.virtual = 0xf1000000,
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.pfn = __phys_to_pfn(0x08000000),
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.length = 0x00100000,
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@@ -88,6 +88,8 @@
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#include <linux/init.h>
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#include <linux/cpufreq.h>
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#include <asm/cputype.h>
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#include <mach/hardware.h>
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#include "generic.h"
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@@ -240,7 +242,7 @@ static struct cpufreq_driver sa1100_driver = {
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static int __init sa1100_dram_init(void)
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{
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if ((processor_id & CPU_SA1100_MASK) == CPU_SA1100_ID)
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if (cpu_is_sa1100())
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return cpufreq_register_driver(&sa1100_driver);
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else
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return -ENODEV;
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@@ -23,10 +23,11 @@
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#include <linux/cpufreq.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/cputype.h>
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#include <asm/mach-types.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include "generic.h"
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@@ -42,7 +42,7 @@ EXPORT_SYMBOL(reset_status);
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static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
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590, /* 59.0 MHz */
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737, /* 73.7 MHz */
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885, /* 88.5 MHz */
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885, /* 88.5 MHz */
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1032, /* 103.2 MHz */
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1180, /* 118.0 MHz */
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1327, /* 132.7 MHz */
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@@ -52,10 +52,10 @@ static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
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1917, /* 191.7 MHz */
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2064, /* 206.4 MHz */
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2212, /* 221.2 MHz */
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2359, /* 235.9 MHz */
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2507, /* 250.7 MHz */
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2654, /* 265.4 MHz */
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2802 /* 280.2 MHz */
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2359, /* 235.9 MHz */
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2507, /* 250.7 MHz */
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2654, /* 265.4 MHz */
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2802 /* 280.2 MHz */
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};
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#if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
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@@ -113,7 +113,7 @@ unsigned int sa11x0_getspeed(unsigned int cpu)
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#else
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/*
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* We still need to provide this so building without cpufreq works.
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*/
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*/
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unsigned int cpufreq_get(unsigned int cpu)
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{
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return cclk_frequency_100khz[PPCR & 0xf] * 100;
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@@ -389,7 +389,7 @@ EXPORT_SYMBOL(sa1100fb_lcd_power);
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*/
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static struct map_desc standard_io_desc[] __initdata = {
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{ /* PCM */
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{ /* PCM */
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.virtual = 0xf8000000,
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.pfn = __phys_to_pfn(0x80000000),
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.length = 0x00100000,
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@@ -2054,19 +2054,3 @@
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/* active display mode) */
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#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */
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#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */
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#ifndef __ASSEMBLY__
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extern unsigned int processor_id;
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#endif
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#define CPU_REVISION (processor_id & 15)
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#define CPU_SA1110_A0 (0)
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#define CPU_SA1110_B0 (4)
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#define CPU_SA1110_B1 (5)
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#define CPU_SA1110_B2 (6)
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#define CPU_SA1110_B4 (8)
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#define CPU_SA1100_ID (0x4401a110)
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#define CPU_SA1100_MASK (0xfffffff0)
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#define CPU_SA1110_ID (0x6901b110)
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#define CPU_SA1110_MASK (0xfffffff0)
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@@ -36,8 +36,26 @@
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#define io_v2p( x ) \
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( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
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#define CPU_SA1110_A0 (0)
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#define CPU_SA1110_B0 (4)
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#define CPU_SA1110_B1 (5)
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#define CPU_SA1110_B2 (6)
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#define CPU_SA1110_B4 (8)
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#define CPU_SA1100_ID (0x4401a110)
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#define CPU_SA1100_MASK (0xfffffff0)
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#define CPU_SA1110_ID (0x6901b110)
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#define CPU_SA1110_MASK (0xfffffff0)
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#ifndef __ASSEMBLY__
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#include <asm/cputype.h>
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#define CPU_REVISION (read_cpuid_id() & 15)
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#define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID)
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#define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID)
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# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
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# define __PREG(x) (io_v2p((unsigned long)&(x)))
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@@ -40,23 +40,21 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
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#define __bus_to_virt(x) __phys_to_virt(x)
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/*
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* Because of the wide memory address space between physical RAM banks on the
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* SA1100, it's much convenient to use Linux's NUMA support to implement our
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* memory map representation. Assuming all memory nodes have equal access
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* Because of the wide memory address space between physical RAM banks on the
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* SA1100, it's much convenient to use Linux's SparseMEM support to implement
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* our memory map representation. Assuming all memory nodes have equal access
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* characteristics, we then have generic discontiguous memory support.
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*
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* Of course, all this isn't mandatory for SA1100 implementations with only
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* one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM.
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*
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* The nodes are matched with the physical memory bank addresses which are
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* incidentally the same as virtual addresses.
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* The sparsemem banks are matched with the physical memory bank addresses
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* which are incidentally the same as virtual addresses.
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*
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* node 0: 0xc0000000 - 0xc7ffffff
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* node 1: 0xc8000000 - 0xcfffffff
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* node 2: 0xd0000000 - 0xd7ffffff
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* node 3: 0xd8000000 - 0xdfffffff
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*/
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#define NODE_MEM_SIZE_BITS 27
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#define MAX_PHYSMEM_BITS 32
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#define SECTION_SIZE_BITS 27
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/*
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* Cache flushing area - SA1100 zero bank
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@@ -122,14 +122,12 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
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GEDR = mask;
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irq = IRQ_GPIO11;
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desc = irq_desc + irq;
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mask >>= 11;
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do {
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if (mask & 1)
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desc_handle_irq(irq, desc);
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generic_handle_irq(irq);
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mask >>= 1;
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irq++;
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desc++;
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} while (mask);
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mask = GEDR & 0xfffff800;
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@@ -33,8 +33,6 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
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unsigned int irr;
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while (1) {
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struct irq_desc *d;
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/*
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* Acknowledge the parent IRQ.
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*/
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@@ -67,21 +65,18 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
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desc->chip->ack(irq);
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if (irr & IRR_ETHERNET) {
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d = irq_desc + IRQ_NEPONSET_SMC9196;
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desc_handle_irq(IRQ_NEPONSET_SMC9196, d);
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generic_handle_irq(IRQ_NEPONSET_SMC9196);
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}
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if (irr & IRR_USAR) {
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d = irq_desc + IRQ_NEPONSET_USAR;
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desc_handle_irq(IRQ_NEPONSET_USAR, d);
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generic_handle_irq(IRQ_NEPONSET_USAR);
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}
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desc->chip->unmask(irq);
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}
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if (irr & IRR_SA1111) {
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d = irq_desc + IRQ_NEPONSET_SA1111;
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desc_handle_irq(IRQ_NEPONSET_SA1111, d);
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generic_handle_irq(IRQ_NEPONSET_SA1111);
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}
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}
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}
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@@ -8,11 +8,10 @@
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#include <linux/ioport.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/mtd/partitions.h>
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#include <mach/hardware.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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@@ -39,8 +38,8 @@
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = PLEB_ETH0_P,
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.end = PLEB_ETH0_P | 0x03ffffff,
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.start = PLEB_ETH0_P,
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.end = PLEB_ETH0_P | 0x03ffffff,
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.flags = IORESOURCE_MEM,
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},
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#if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */
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@@ -87,15 +86,15 @@ static struct resource pleb_flash_resources[] = {
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static struct mtd_partition pleb_partitions[] = {
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{
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.name = "blob",
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.offset = 0,
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.offset = 0,
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.size = 0x00020000,
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}, {
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.offset = MTDPART_OFS_APPEND,
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.size = 0x000e0000,
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}, {
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.name = "rootfs",
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.offset = MTDPART_OFS_APPEND,
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.offset = MTDPART_OFS_APPEND,
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.size = 0x00300000,
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}
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};
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@@ -12,6 +12,7 @@
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <mach/hardware.h>
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@@ -27,7 +28,6 @@
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#include <linux/serial_core.h>
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#include <linux/ioport.h>
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#include <asm/io.h>
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#include "generic.h"
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@@ -17,8 +17,8 @@
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <mach/hardware.h>
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#include <asm/hardware/ssp.h>
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