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irqchip/gic-v3: Make gic_enable_sre an inline function

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In order for gic_enable_sre to be used by the arm64 core code,
move it to arm-gic-v3.h. As a bonus, we now also check if
system registers have been already enabled, and return early
if they have.

In all cases, the function now returns a boolean indicating if
the enabling has been successful.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Marc Zyngier
2015-09-30 11:48:01 +01:00
parent d271976dbb
commit 7cabd0086a
2 changed files with 25 additions and 23 deletions
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16
include/linux/irqchip/arm-gic-v3.h
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@@ -398,6 +398,22 @@ static inline void gic_write_dir(u64 irq)
isb();
}
static inline bool gic_enable_sre(void)
{
u64 val;
asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val));
if (val & ICC_SRE_EL1_SRE)
return true;
val |= ICC_SRE_EL1_SRE;
asm volatile("msr_s " __stringify(ICC_SRE_EL1) ", %0" : : "r" (val));
isb();
asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val));
return !!(val & ICC_SRE_EL1_SRE);
}
struct irq_domain;
int its_cpu_init(void);
int its_init(struct device_node *node, struct rdists *rdists,