drm/amdgpu: add FENCE_TO_HANDLE ioctl that returns syncobj or sync_file
for being able to convert an amdgpu fence into one of the handles. Mesa will use this. Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher

parent
684fd0af47
commit
7ca24cf2d2
@@ -52,6 +52,7 @@ extern "C" {
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#define DRM_AMDGPU_GEM_USERPTR 0x11
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#define DRM_AMDGPU_WAIT_FENCES 0x12
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#define DRM_AMDGPU_VM 0x13
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#define DRM_AMDGPU_FENCE_TO_HANDLE 0x14
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#define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
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#define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
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@@ -67,6 +68,7 @@ extern "C" {
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#define DRM_IOCTL_AMDGPU_GEM_USERPTR DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_USERPTR, struct drm_amdgpu_gem_userptr)
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#define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
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#define DRM_IOCTL_AMDGPU_VM DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_VM, union drm_amdgpu_vm)
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#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
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#define AMDGPU_GEM_DOMAIN_CPU 0x1
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#define AMDGPU_GEM_DOMAIN_GTT 0x2
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@@ -515,6 +517,20 @@ struct drm_amdgpu_cs_chunk_sem {
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__u32 handle;
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};
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#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ 0
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#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD 1
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#define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD 2
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union drm_amdgpu_fence_to_handle {
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struct {
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struct drm_amdgpu_fence fence;
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__u32 what;
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} in;
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struct {
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__u32 handle;
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} out;
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};
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struct drm_amdgpu_cs_chunk_data {
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union {
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struct drm_amdgpu_cs_chunk_ib ib_data;
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