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IB/mlx5: Add DCT RoCE LAG support

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When DCT QPs work in RoCE LAG mode:
 1. DCT creation is allowed only when it is supported
 2. The "port" of a DCT QP is assigned in a round-robin way

Link: https://lore.kernel.org/r/20200818115245.700581-3-leon@kernel.org
Signed-off-by: Mark Zhang <markz@mellanox.com>
Reviewed-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
Mark Zhang
2020-08-18 14:52:45 +03:00
committed by Jason Gunthorpe
parent 8f3243a047
commit 7c4b1ab9f1
2 changed files with 10 additions and 2 deletions
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3
include/linux/mlx5/mlx5_ifc.h
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@@ -1430,7 +1430,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 log_bf_reg_size[0x5];
u8 reserved_at_270[0x8];
u8 reserved_at_270[0x6];
u8 lag_dct[0x2];
u8 lag_tx_port_affinity[0x1];
u8 reserved_at_279[0x2];
u8 lag_master[0x1];