xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge branch 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

Browse Source 
* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (163 commits)
  omap: complete removal of machine_desc.io_pg_offst and .phys_io
  omap: UART: fix wakeup registers for OMAP24xx UART2
  omap: Fix spotty MMC voltages
  ASoC: OMAP4: MCPDM: Remove unnecessary include of plat/control.h
  serial: omap-serial: fix signess error
  OMAP3: DMA: Errata i541: sDMA FIFO draining does not finish
  omap: dma: Fix buffering disable bit setting for omap24xx
  omap: serial: Fix the boot-up crash/reboot without CONFIG_PM
  OMAP3: PM: fix scratchpad memory accesses for off-mode
  omap4: pandaboard: enable the ehci port on pandaboard
  omap4: pandaboard: Fix the init if CONFIG_MMC_OMAP_HS is not set
  omap4: pandaboard: remove unused hsmmc definition
  OMAP: McBSP: Remove null omap44xx ops comment
  OMAP: McBSP: Swap CLKS source definition
  OMAP: McBSP: Fix CLKR and FSR signal muxing
  OMAP2+: clock: reduce the amount of standard debugging while disabling unused clocks
  OMAP: control: move plat-omap/control.h to mach-omap2/control.h
  OMAP: split plat-omap/common.c
  OMAP: McBSP: implement functional clock switching via clock framework
  OMAP: McBSP: implement McBSP CLKR and FSR signal muxing via mach-omap2/mcbsp.c
  ...

Fixed up trivial conflicts in arch/arm/mach-omap2/
{board-zoom-peripherals.c,devices.c} as per Tony
This commit is contained in:
Linus Torvalds
2010-10-25 13:46:56 -07:00
parent 72e58063d6 bc487fb341
commit 7b6181e068
154 changed files with 12796 additions and 3863 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/usb/gadget/omap_udc.c
View File

@@ -54,7 +54,6 @@
#include <plat/dma.h>
#include <plat/usb.h>
#include <plat/control.h>
#include "omap_udc.h"
@@ -2309,21 +2308,12 @@ static char *trx_mode(unsigned m, int enabled)
static int proc_otg_show(struct seq_file *s)
{
u32 tmp;
u32 trans;
char *ctrl_name;
u32 trans = 0;
char *ctrl_name = "(UNKNOWN)";
/* XXX This needs major revision for OMAP2+ */
tmp = omap_readl(OTG_REV);
if (cpu_is_omap24xx()) {
/*
* REVISIT: Not clear how this works on OMAP2. trans
* is ANDed to produce bits 7 and 8, which might make
* sense for USB_TRANSCEIVER_CTRL on OMAP1,
* but with CONTROL_DEVCONF, these bits have something to
* do with the frame adjustment counter and McBSP2.
*/
ctrl_name = "control_devconf";
trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
} else {
if (cpu_class_is_omap1()) {
ctrl_name = "tranceiver_ctrl";
trans = omap_readw(USB_TRANSCEIVER_CTRL);
}