Merge tag 'pci-v4.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas: "Enumeration: - Refine PCI support check in pcibios_init() (Adrian-Ken Rueegsegger) - Provide common functions for ECAM mapping (Jayachandran C) - Allow all PCIe services on non-ACPI host bridges (Jon Derrick) - Remove return values from pcie_port_platform_notify() and relatives (Jon Derrick) - Widen portdrv service type from 4 bits to 8 bits (Keith Busch) - Add Downstream Port Containment portdrv service type (Keith Busch) - Add Downstream Port Containment driver (Keith Busch) Resource management: - Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs (Alex Williamson) - Supply CPU physical address (not bus address) to iomem_is_exclusive() (Bjorn Helgaas) - alpha: Call iomem_is_exclusive() for IORESOURCE_MEM, but not IORESOURCE_IO (Bjorn Helgaas) - Mark Broadwell-EP Home Agent 1 as having non-compliant BARs (Prarit Bhargava) - Disable all BAR sizing for devices with non-compliant BARs (Prarit Bhargava) - Move PCI I/O space management from OF to PCI core code (Tomasz Nowicki) PCI device hotplug: - acpiphp_ibm: Avoid uninitialized variable reference (Dan Carpenter) - Use cached copy of PCI_EXP_SLTCAP_HPC bit (Lukas Wunner) Virtualization: - Mark Intel i40e NIC INTx masking as broken (Alex Williamson) - Reverse standard ACS vs device-specific ACS enabling (Alex Williamson) - Work around Intel Sunrise Point PCH incorrect ACS capability (Alex Williamson) IOMMU: - Add pci_add_dma_alias() to abstract implementation (Bjorn Helgaas) - Move informational printk to pci_add_dma_alias() (Bjorn Helgaas) - Add support for multiple DMA aliases (Jacek Lawrynowicz) - Add DMA alias quirk for mic_x200_dma (Jacek Lawrynowicz) Thunderbolt: - Fix double free of drom buffer (Andreas Noever) - Add Intel Thunderbolt device IDs (Lukas Wunner) - Fix typos and magic number (Lukas Wunner) - Support 1st gen Light Ridge controller (Lukas Wunner) Generic host bridge driver: - Use generic ECAM API (Jayachandran C) Cavium ThunderX host bridge driver: - Don't clobber read-only bits in bridge config registers (David Daney) - Use generic ECAM API (Jayachandran C) Freescale i.MX6 host bridge driver: - Use enum instead of bool for variant indicator (Andrey Smirnov) - Implement reset sequence for i.MX6+ (Andrey Smirnov) - Factor out ref clock enable (Bjorn Helgaas) - Add initial imx6sx support (Christoph Fritz) - Add reset-gpio-active-high boolean property to DT (Petr Štetiar) - Add DT property for link gen, default to Gen1 (Tim Harvey) - dts: Specify imx6qp version of PCIe core (Andrey Smirnov) - dts: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora (Petr Štetiar) Marvell Armada host bridge driver: - add DT binding for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni) - Add driver for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni) Marvell MVEBU host bridge driver: - Constify mvebu_pcie_pm_ops structure (Jisheng Zhang) - Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS for mvebu_pcie_pm_ops (Jisheng Zhang) Microsoft Hyper-V host bridge driver: - Report resources release after stopping the bus (Vitaly Kuznetsov) - Add explicit barriers to config space access (Vitaly Kuznetsov) Renesas R-Car host bridge driver: - Select PCI_MSI_IRQ_DOMAIN (Arnd Bergmann) Synopsys DesignWare host bridge driver: - Remove incorrect RC memory base/limit configuration (Gabriele Paoloni) - Move Root Complex setup code to dw_pcie_setup_rc() (Jisheng Zhang) TI Keystone host bridge driver: - Add error IRQ handler (Murali Karicheri) - Remove unnecessary goto statement (Murali Karicheri) Miscellaneous: - Fix spelling errors (Colin Ian King)" * tag 'pci-v4.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits) PCI: Disable all BAR sizing for devices with non-compliant BARs x86/PCI: Mark Broadwell-EP Home Agent 1 as having non-compliant BARs PCI: Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs PCI, of: Move PCI I/O space management to PCI core code PCI: generic, thunder: Use generic ECAM API PCI: Provide common functions for ECAM mapping PCI: hv: Add explicit barriers to config space access PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit PCI: Add Downstream Port Containment driver PCI: Add Downstream Port Containment portdrv service type PCI: Widen portdrv service type from 4 bits to 8 bits PCI: designware: Remove incorrect RC memory base/limit configuration PCI: hv: Report resources release after stopping the bus ARM: dts: imx6qp: Specify imx6qp version of PCIe core PCI: imx6: Implement reset sequence for i.MX6+ PCI: imx6: Use enum instead of bool for variant indicator PCI: thunder: Don't clobber read-only bits in bridge config registers thunderbolt: Fix double free of drom buffer PCI: rcar: Select PCI_MSI_IRQ_DOMAIN PCI: armada: Add driver for Marvell Armada 7K/8K PCIe controller ...
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@@ -4,8 +4,8 @@ This PCIe host controller is based on the Synopsis Designware PCIe IP
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and thus inherits all the common properties defined in designware-pcie.txt.
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Required properties:
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- compatible: "fsl,imx6q-pcie"
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- reg: base addresse and length of the pcie controller
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- compatible: "fsl,imx6q-pcie", "fsl,imx6sx-pcie", "fsl,imx6qp-pcie"
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- reg: base address and length of the PCIe controller
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- interrupts: A list of interrupt outputs of the controller. Must contain an
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entry for each entry in the interrupt-names property.
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- interrupt-names: Must include the following entries:
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@@ -19,6 +19,20 @@ Optional properties:
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- fsl,tx-deemph-gen2-6db: Gen2 (6db) De-emphasis value. Default: 20
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- fsl,tx-swing-full: Gen2 TX SWING FULL value. Default: 127
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- fsl,tx-swing-low: TX launch amplitude swing_low value. Default: 127
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- fsl,max-link-speed: Specify PCI gen for link capability. Must be '2' for
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gen2, otherwise will default to gen1. Note that the IMX6 LVDS clock outputs
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do not meet gen2 jitter requirements and thus for gen2 capability a gen2
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compliant clock generator should be used and configured.
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- reset-gpio: Should specify the GPIO for controlling the PCI bus device reset
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signal. It's not polarity aware and defaults to active-low reset sequence
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(L=reset state, H=operation state).
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- reset-gpio-active-high: If present then the reset sequence using the GPIO
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specified in the "reset-gpio" property is reversed (H=reset state,
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L=operation state).
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Additional required properties for imx6sx-pcie:
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- clock names: Must include the following additional entries:
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- "pcie_inbound_axi"
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Example:
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38
Documentation/devicetree/bindings/pci/pci-armada8k.txt
Normal file
38
Documentation/devicetree/bindings/pci/pci-armada8k.txt
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@@ -0,0 +1,38 @@
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* Marvell Armada 7K/8K PCIe interface
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This PCIe host controller is based on the Synopsis Designware PCIe IP
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and thus inherits all the common properties defined in designware-pcie.txt.
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Required properties:
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- compatible: "marvell,armada8k-pcie"
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- reg: must contain two register regions
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- the control register region
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- the config space region
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- reg-names:
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- "ctrl" for the control register region
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- "config" for the config space region
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- interrupts: Interrupt specifier for the PCIe controler
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- clocks: reference to the PCIe controller clock
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Example:
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pcie@f2600000 {
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compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
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reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>;
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reg-names = "ctrl", "config";
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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device_type = "pci";
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dma-coherent;
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bus-range = <0 0xff>;
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ranges = <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 /* downstream I/O */
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0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; /* non-prefetchable memory */
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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num-lanes = <1>;
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clocks = <&cpm_syscon0 1 13>;
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status = "disabled";
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};
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@@ -56,6 +56,7 @@ Optional properties:-
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phy-names: name of the Generic Keystine SerDes phy for PCI
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- If boot loader already does PCI link establishment, then phys and
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phy-names shouldn't be present.
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interrupts: platform interrupt for error interrupts.
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Designware DT Properties not applicable for Keystone PCI
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