arm64: sysreg: Move to use definitions for all the SCTLR bits
__cpu_setup() configures SCTLR_EL1 using some hard coded hex masks, and el2_setup() duplicates some this when setting RES1 bits. Lets make this the same as KVM's hyp_init, which uses named bits. First, we add definitions for all the SCTLR_EL{1,2} bits, the RES{1,0} bits, and those we want to set or clear. Add a build_bug checks to ensures all bits are either set or clear. This means we don't need to preserve endian-ness configuration generated elsewhere. Finally, move the head.S and proc.S users of these hard-coded masks over to the macro versions. Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Catalin Marinas

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@@ -20,6 +20,7 @@
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#ifndef __ASM_SYSREG_H
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#define __ASM_SYSREG_H
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#include <asm/compiler.h>
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#include <linux/stringify.h>
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/*
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@@ -398,25 +399,81 @@
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/* Common SCTLR_ELx flags. */
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#define SCTLR_ELx_EE (1 << 25)
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#define SCTLR_ELx_WXN (1 << 19)
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#define SCTLR_ELx_I (1 << 12)
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#define SCTLR_ELx_SA (1 << 3)
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#define SCTLR_ELx_C (1 << 2)
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#define SCTLR_ELx_A (1 << 1)
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#define SCTLR_ELx_M 1
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#define SCTLR_EL2_RES1 ((1 << 4) | (1 << 5) | (1 << 11) | (1 << 16) | \
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(1 << 18) | (1 << 22) | (1 << 23) | (1 << 28) | \
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(1 << 29))
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#define SCTLR_ELx_FLAGS (SCTLR_ELx_M | SCTLR_ELx_A | SCTLR_ELx_C | \
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SCTLR_ELx_SA | SCTLR_ELx_I)
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/* SCTLR_EL2 specific flags. */
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#define SCTLR_EL2_RES1 ((1 << 4) | (1 << 5) | (1 << 11) | (1 << 16) | \
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(1 << 18) | (1 << 22) | (1 << 23) | (1 << 28) | \
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(1 << 29))
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#define SCTLR_EL2_RES0 ((1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) | \
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(1 << 10) | (1 << 13) | (1 << 14) | (1 << 15) | \
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(1 << 17) | (1 << 20) | (1 << 21) | (1 << 24) | \
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(1 << 26) | (1 << 27) | (1 << 30) | (1 << 31))
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#ifdef CONFIG_CPU_BIG_ENDIAN
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#define ENDIAN_SET_EL2 SCTLR_ELx_EE
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#define ENDIAN_CLEAR_EL2 0
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#else
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#define ENDIAN_SET_EL2 0
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#define ENDIAN_CLEAR_EL2 SCTLR_ELx_EE
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#endif
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/* SCTLR_EL2 value used for the hyp-stub */
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#define SCTLR_EL2_SET (ENDIAN_SET_EL2 | SCTLR_EL2_RES1)
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#define SCTLR_EL2_CLEAR (SCTLR_ELx_M | SCTLR_ELx_A | SCTLR_ELx_C | \
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SCTLR_ELx_SA | SCTLR_ELx_I | SCTLR_ELx_WXN | \
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ENDIAN_CLEAR_EL2 | SCTLR_EL2_RES0)
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/* Check all the bits are accounted for */
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#define SCTLR_EL2_BUILD_BUG_ON_MISSING_BITS BUILD_BUG_ON((SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != ~0)
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/* SCTLR_EL1 specific flags. */
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#define SCTLR_EL1_UCI (1 << 26)
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#define SCTLR_EL1_E0E (1 << 24)
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#define SCTLR_EL1_SPAN (1 << 23)
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#define SCTLR_EL1_NTWE (1 << 18)
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#define SCTLR_EL1_NTWI (1 << 16)
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#define SCTLR_EL1_UCT (1 << 15)
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#define SCTLR_EL1_DZE (1 << 14)
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#define SCTLR_EL1_UMA (1 << 9)
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#define SCTLR_EL1_SED (1 << 8)
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#define SCTLR_EL1_ITD (1 << 7)
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#define SCTLR_EL1_CP15BEN (1 << 5)
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#define SCTLR_EL1_SA0 (1 << 4)
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#define SCTLR_EL1_RES1 ((1 << 11) | (1 << 20) | (1 << 22) | (1 << 28) | \
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(1 << 29))
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#define SCTLR_EL1_RES0 ((1 << 6) | (1 << 10) | (1 << 13) | (1 << 17) | \
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(1 << 21) | (1 << 27) | (1 << 30) | (1 << 31))
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#ifdef CONFIG_CPU_BIG_ENDIAN
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#define ENDIAN_SET_EL1 (SCTLR_EL1_E0E | SCTLR_ELx_EE)
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#define ENDIAN_CLEAR_EL1 0
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#else
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#define ENDIAN_SET_EL1 0
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#define ENDIAN_CLEAR_EL1 (SCTLR_EL1_E0E | SCTLR_ELx_EE)
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#endif
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#define SCTLR_EL1_SET (SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_SA |\
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SCTLR_EL1_SA0 | SCTLR_EL1_SED | SCTLR_ELx_I |\
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SCTLR_EL1_DZE | SCTLR_EL1_UCT | SCTLR_EL1_NTWI |\
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SCTLR_EL1_NTWE | SCTLR_EL1_SPAN | ENDIAN_SET_EL1 |\
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SCTLR_EL1_UCI | SCTLR_EL1_RES1)
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#define SCTLR_EL1_CLEAR (SCTLR_ELx_A | SCTLR_EL1_CP15BEN | SCTLR_EL1_ITD |\
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SCTLR_EL1_UMA | SCTLR_ELx_WXN | ENDIAN_CLEAR_EL1 |\
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SCTLR_EL1_RES0)
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/* Check all the bits are accounted for */
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#define SCTLR_EL1_BUILD_BUG_ON_MISSING_BITS BUILD_BUG_ON((SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != ~0)
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/* id_aa64isar0 */
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#define ID_AA64ISAR0_FHM_SHIFT 48
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@@ -593,6 +650,7 @@
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#else
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#include <linux/build_bug.h>
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#include <linux/types.h>
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asm(
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@@ -649,6 +707,9 @@ static inline void config_sctlr_el1(u32 clear, u32 set)
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{
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u32 val;
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SCTLR_EL2_BUILD_BUG_ON_MISSING_BITS;
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SCTLR_EL1_BUILD_BUG_ON_MISSING_BITS;
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val = read_sysreg(sctlr_el1);
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val &= ~clear;
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val |= set;
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