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[PATCH] sky2: fix FIFO DMA alignment problems

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The Yukon2 chip FIFO has a problem recovering from a pause frame
if the receive buffer is not aligned. The workaround is to just
leave receive buffer at original alignment, which will make IP
header unaligned. Rework receive logic for clarity.

Need to ignore receive overrun interrupts (or mac hangs).

These fixes make the sky2 driver generally usable.

Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This commit is contained in:
Stephen Hemminger
2005-09-19 15:42:33 -07:00
committed by Jeff Garzik
parent 08217637fe
commit 79e57d32fe
2 changed files with 41 additions and 39 deletions
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2
drivers/net/sky2.h
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@@ -1679,7 +1679,7 @@ enum {
GM_IS_RX_FF_OR = 1<<1, /* Receive FIFO Overrun */
GM_IS_RX_COMPL = 1<<0, /* Frame Reception Complete */
#define GMAC_DEF_MSK (GM_IS_TX_FF_UR|GM_IS_RX_FF_OR)
#define GMAC_DEF_MSK GM_IS_TX_FF_UR
/* GMAC_LINK_CTRL 16 bit GMAC Link Control Reg (YUKON only) */
/* Bits 15.. 2: reserved */