Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (272 commits) Fix soc_common PCMCIA configuration ARM: 5827/1: SA1100: h3100/h3600: emit messages on failed gpio_request ARM: 5826/1: SA1100: h3100/h3600: always build htc-egpio driver ARM: 5825/1: SA1100: h3600: update defconfig ARM: 5824/1: SA1100: reuse h3600 PCMCIA driver on h3100 ARM: 5823/1: SA1100: h3100/h3600: add support for gpio-keys ARM: 5822/1: SA1100: h3100/h3600: clean up #includes ARM: 5821/1: SA1100: h3100/h3600: revise copyright boilerplates ARM: 5820/1: SA1100: h3100/h3600: split h3600.c ARM: 5819/1: SA1100: h3100/h3600: merge h3600.h and h3600_gpio.h into h3xxx.h ARM: 5818/1: SA1100: h3100/h3600: drop old GPIO definitions ARM: 5817/1: SA1100: h3100/h3600: configure all unused gpios as inputs ARM: 5816/1: SA1100: h3600: remove IRQ_GPIO_* definitions ARM: 5815/1: SA1100: h3100/h3600: remove now unused assign_h3600_egpio handlers ARM: 5814/1: SA1100: h3100/h3600: convert all users of assign_h3600_egpio to gpiolib ARM: 5813/1: SA1100: h3100/h3600: add htc-egpio driver ARM: 5812/1: SA1100: h3100/h3600: separate machine-specific LCD helpers ARM: 5811/2: pcmcia: convert sa1100_h3600 driver to gpiolib ARM: 5799/1: SA1100: h3600: stop setting direction for LCD pins ARM: 5798/1: SA1100: h3600: remove unused cruft from h3600.h ...
This commit is contained in:
Linus Torvalds
@@ -159,6 +159,12 @@ config S3C_GPIO_CFG_S3C64XX
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Internal configuration to enable S3C64XX style GPIO configuration
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functions.
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config S5P_GPIO_CFG_S5PC1XX
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bool
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help
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Internal configuration to enable S5PC1XX style GPIO configuration
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functions.
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# DMA
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config S3C_DMA
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@@ -178,6 +184,11 @@ config S3C_DEV_HSMMC1
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help
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Compile in platform device definitions for HSMMC channel 1
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config S3C_DEV_HSMMC2
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bool
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help
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Compile in platform device definitions for HSMMC channel 2
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config S3C_DEV_I2C1
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bool
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help
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@@ -36,6 +36,7 @@ obj-$(CONFIG_HAVE_PWM) += pwm.o
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obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
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obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
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obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
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obj-y += dev-i2c0.o
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obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
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obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
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@@ -1,6 +1,6 @@
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/* linux/arch/arm/plat-s3c24xx/clock.c
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*
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* Copyright (c) 2004-2005 Simtec Electronics
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* Copyright 2004-2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C24XX Core clock control support
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@@ -337,7 +337,7 @@ int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
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int __init s3c24xx_register_baseclocks(unsigned long xtal)
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{
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printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n");
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printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n");
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clk_xtal.rate = xtal;
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69
arch/arm/plat-s3c/dev-hsmmc2.c
Normal file
69
arch/arm/plat-s3c/dev-hsmmc2.c
Normal file
@@ -0,0 +1,69 @@
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/* linux/arch/arm/plat-s3c/dev-hsmmc2.c
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*
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* Copyright (c) 2009 Samsung Electronics
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* Copyright (c) 2009 Maurus Cuelenaere
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*
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* Based on arch/arm/plat-s3c/dev-hsmmc1.c
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* original file Copyright (c) 2008 Simtec Electronics
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*
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* S3C series device definition for hsmmc device 2
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/mmc/host.h>
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#include <mach/map.h>
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#include <plat/sdhci.h>
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#include <plat/devs.h>
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#define S3C_SZ_HSMMC (0x1000)
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static struct resource s3c_hsmmc2_resource[] = {
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[0] = {
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.start = S3C_PA_HSMMC2,
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.end = S3C_PA_HSMMC2 + S3C_SZ_HSMMC - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_HSMMC2,
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.end = IRQ_HSMMC2,
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.flags = IORESOURCE_IRQ,
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}
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};
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static u64 s3c_device_hsmmc2_dmamask = 0xffffffffUL;
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struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
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.max_width = 4,
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.host_caps = (MMC_CAP_4_BIT_DATA |
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MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
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};
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struct platform_device s3c_device_hsmmc2 = {
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.name = "s3c-sdhci",
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.id = 2,
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.num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
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.resource = s3c_hsmmc2_resource,
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.dev = {
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.dma_mask = &s3c_device_hsmmc2_dmamask,
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.coherent_dma_mask = 0xffffffffUL,
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.platform_data = &s3c_hsmmc2_def_platdata,
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},
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};
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void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
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{
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struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata;
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set->max_width = pd->max_width;
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if (pd->cfg_gpio)
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set->cfg_gpio = pd->cfg_gpio;
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if (pd->cfg_card)
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set->cfg_card = pd->cfg_card;
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}
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@@ -1,6 +1,6 @@
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/* linux/arch/arm/plat-s3c/dev-i2c0.c
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*
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* Copyright 2008,2009 Simtec Electronics
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* Copyright 2008-2009 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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@@ -1,6 +1,6 @@
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/* linux/arch/arm/plat-s3c/dev-i2c1.c
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*
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* Copyright 2008,2009 Simtec Electronics
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* Copyright 2008-2009 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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@@ -9,8 +9,12 @@
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <mach/map.h>
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#include <plat/devs.h>
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#include <plat/nand.h>
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static struct resource s3c_nand_resource[] = {
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[0] = {
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@@ -28,3 +32,96 @@ struct platform_device s3c_device_nand = {
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};
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EXPORT_SYMBOL(s3c_device_nand);
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/**
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* s3c_nand_copy_set() - copy nand set data
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* @set: The new structure, directly copied from the old.
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*
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* Copy all the fields from the NAND set field from what is probably __initdata
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* to new kernel memory. The code returns 0 if the copy happened correctly or
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* an error code for the calling function to display.
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*
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* Note, we currently do not try and look to see if we've already copied the
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* data in a previous set.
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*/
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static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
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{
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void *ptr;
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int size;
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size = sizeof(struct mtd_partition) * set->nr_partitions;
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if (size) {
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ptr = kmemdup(set->partitions, size, GFP_KERNEL);
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set->partitions = ptr;
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if (!ptr)
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return -ENOMEM;
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}
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size = sizeof(int) * set->nr_chips;
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if (size) {
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ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
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set->nr_map = ptr;
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if (!ptr)
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return -ENOMEM;
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}
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if (set->ecc_layout) {
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ptr = kmemdup(set->ecc_layout,
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sizeof(struct nand_ecclayout), GFP_KERNEL);
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set->ecc_layout = ptr;
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if (!ptr)
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return -ENOMEM;
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}
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return 0;
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}
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void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
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{
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struct s3c2410_platform_nand *npd;
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int size;
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int ret;
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/* note, if we get a failure in allocation, we simply drop out of the
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* function. If there is so little memory available at initialisation
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* time then there is little chance the system is going to run.
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*/
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npd = kmemdup(nand, sizeof(struct s3c2410_platform_nand), GFP_KERNEL);
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if (!npd) {
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printk(KERN_ERR "%s: failed copying platform data\n", __func__);
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return;
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}
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/* now see if we need to copy any of the nand set data */
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size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
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if (size) {
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struct s3c2410_nand_set *from = npd->sets;
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struct s3c2410_nand_set *to;
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int i;
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to = kmemdup(from, size, GFP_KERNEL);
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npd->sets = to; /* set, even if we failed */
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if (!to) {
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printk(KERN_ERR "%s: no memory for sets\n", __func__);
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return;
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}
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for (i = 0; i < npd->nr_sets; i++) {
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ret = s3c_nand_copy_set(to);
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if (!ret) {
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printk(KERN_ERR "%s: failed to copy set %d\n",
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__func__, i);
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return;
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}
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to++;
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}
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}
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}
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EXPORT_SYMBOL_GPL(s3c_nand_set_platdata);
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@@ -1,6 +1,6 @@
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/* linux/arch/arm/plat-s3c/dma.c
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*
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* Copyright (c) 2003-2005,2006,2009 Simtec Electronics
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* Copyright (c) 2003-2009 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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@@ -33,5 +33,5 @@ struct s3c24xx_audio_simtec_pdata {
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void (*startup)(void);
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};
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extern int simtec_audio_add(const char *codec_name,
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extern int simtec_audio_add(const char *codec_name, bool has_lr_routing,
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struct s3c24xx_audio_simtec_pdata *pdata);
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@@ -1,6 +1,6 @@
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/* arch/arm/plat-s3c/include/plat/cpu-freq.h
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*
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* Copyright (c) 2006,2007 Simtec Electronics
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* Copyright (c) 2006-2007 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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@@ -12,6 +12,9 @@
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/* todo - fix when rmk changes iodescs to use `void __iomem *` */
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#ifndef __SAMSUNG_PLAT_CPU_H
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#define __SAMSUNG_PLAT_CPU_H
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#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
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#ifndef MHZ
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@@ -73,3 +76,6 @@ extern struct sysdev_class s3c2443_sysclass;
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extern struct sysdev_class s3c6410_sysclass;
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extern struct sysdev_class s3c64xx_sysclass;
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extern void (*s5pc1xx_idle)(void);
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#endif
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@@ -1,6 +1,6 @@
|
||||
/* arch/arm/plat-s3c/include/plat/dma.h
|
||||
*
|
||||
* Copyright (C) 2003,2004,2006 Simtec Electronics
|
||||
* Copyright (C) 2003-2006 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* Samsung S3C DMA support
|
||||
|
||||
@@ -70,4 +70,11 @@ extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd);
|
||||
*/
|
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extern void s3c64xx_fb_gpio_setup_24bpp(void);
|
||||
|
||||
/**
|
||||
* s5pc100_fb_gpio_setup_24bpp() - S5PC100 setup function for 24bpp LCD
|
||||
*
|
||||
* Initialise the GPIO for an 24bpp LCD display on the RGB interface.
|
||||
*/
|
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extern void s5pc100_fb_gpio_setup_24bpp(void);
|
||||
|
||||
#endif /* __PLAT_S3C_FB_H */
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* arch/arm/plat-s3c/include/plat/iic.h
|
||||
*
|
||||
* Copyright 2004,2009 Simtec Electronics
|
||||
* Copyright 2004-2009 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C - I2C Controller platform_device info
|
||||
|
||||
@@ -55,3 +55,11 @@ struct s3c2410_platform_nand {
|
||||
int chip);
|
||||
};
|
||||
|
||||
/**
|
||||
* s3c_nand_set_platdata() - register NAND platform data.
|
||||
* @nand: The NAND platform data to register with s3c_device_nand.
|
||||
*
|
||||
* This function copies the given NAND platform data, @nand and registers
|
||||
* it with the s3c_device_nand. This allows @nand to be __initdata.
|
||||
*/
|
||||
extern void s3c_nand_set_platdata(struct s3c2410_platform_nand *nand);
|
||||
|
||||
235
arch/arm/plat-s3c/include/plat/regs-fb-v4.h
Normal file
235
arch/arm/plat-s3c/include/plat/regs-fb-v4.h
Normal file
@@ -0,0 +1,235 @@
|
||||
/* arch/arm/plat-s3c/include/plat/regs-fb-v4.h
|
||||
*
|
||||
* Copyright 2008 Openmoko, Inc.
|
||||
* Copyright 2008 Simtec Electronics
|
||||
* http://armlinux.simtec.co.uk/
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* S3C64XX - new-style framebuffer register definitions
|
||||
*
|
||||
* This is the register set for the new style framebuffer interface
|
||||
* found from the S3C2443 onwards and specifically the S3C64XX series
|
||||
* S3C6400 and S3C6410.
|
||||
*
|
||||
* The file contains the cpu specific items which change between whichever
|
||||
* architecture is selected. See <plat/regs-fb.h> for the core definitions
|
||||
* that are the same.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/* include the core definitions here, in case we really do need to
|
||||
* override them at a later date.
|
||||
*/
|
||||
|
||||
#include <plat/regs-fb.h>
|
||||
|
||||
#define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */
|
||||
#define VIDCON1_FSTATUS_EVEN (1 << 15)
|
||||
|
||||
/* Video timing controls */
|
||||
#define VIDTCON0 (0x10)
|
||||
#define VIDTCON1 (0x14)
|
||||
#define VIDTCON2 (0x18)
|
||||
|
||||
/* Window position controls */
|
||||
|
||||
#define WINCON(_win) (0x20 + ((_win) * 4))
|
||||
|
||||
/* OSD1 and OSD4 do not have register D */
|
||||
|
||||
#define VIDOSD_A(_win) (0x40 + ((_win) * 16))
|
||||
#define VIDOSD_B(_win) (0x44 + ((_win) * 16))
|
||||
#define VIDOSD_C(_win) (0x48 + ((_win) * 16))
|
||||
#define VIDOSD_D(_win) (0x4C + ((_win) * 16))
|
||||
|
||||
|
||||
#define VIDINTCON0 (0x130)
|
||||
|
||||
#define WxKEYCONy(_win, _con) ((0x140 + ((_win) * 8)) + ((_con) * 4))
|
||||
|
||||
/* WINCONx */
|
||||
|
||||
#define WINCONx_CSCWIDTH_MASK (0x3 << 26)
|
||||
#define WINCONx_CSCWIDTH_SHIFT (26)
|
||||
#define WINCONx_CSCWIDTH_WIDE (0x0 << 26)
|
||||
#define WINCONx_CSCWIDTH_NARROW (0x3 << 26)
|
||||
|
||||
#define WINCONx_ENLOCAL (1 << 22)
|
||||
#define WINCONx_BUFSTATUS (1 << 21)
|
||||
#define WINCONx_BUFSEL (1 << 20)
|
||||
#define WINCONx_BUFAUTOEN (1 << 19)
|
||||
#define WINCONx_YCbCr (1 << 13)
|
||||
|
||||
#define WINCON1_LOCALSEL_CAMIF (1 << 23)
|
||||
|
||||
#define WINCON2_LOCALSEL_CAMIF (1 << 23)
|
||||
#define WINCON2_BLD_PIX (1 << 6)
|
||||
|
||||
#define WINCON2_ALPHA_SEL (1 << 1)
|
||||
#define WINCON2_BPPMODE_MASK (0xf << 2)
|
||||
#define WINCON2_BPPMODE_SHIFT (2)
|
||||
#define WINCON2_BPPMODE_1BPP (0x0 << 2)
|
||||
#define WINCON2_BPPMODE_2BPP (0x1 << 2)
|
||||
#define WINCON2_BPPMODE_4BPP (0x2 << 2)
|
||||
#define WINCON2_BPPMODE_8BPP_1232 (0x4 << 2)
|
||||
#define WINCON2_BPPMODE_16BPP_565 (0x5 << 2)
|
||||
#define WINCON2_BPPMODE_16BPP_A1555 (0x6 << 2)
|
||||
#define WINCON2_BPPMODE_16BPP_I1555 (0x7 << 2)
|
||||
#define WINCON2_BPPMODE_18BPP_666 (0x8 << 2)
|
||||
#define WINCON2_BPPMODE_18BPP_A1665 (0x9 << 2)
|
||||
#define WINCON2_BPPMODE_19BPP_A1666 (0xa << 2)
|
||||
#define WINCON2_BPPMODE_24BPP_888 (0xb << 2)
|
||||
#define WINCON2_BPPMODE_24BPP_A1887 (0xc << 2)
|
||||
#define WINCON2_BPPMODE_25BPP_A1888 (0xd << 2)
|
||||
#define WINCON2_BPPMODE_28BPP_A4888 (0xd << 2)
|
||||
|
||||
#define WINCON3_BLD_PIX (1 << 6)
|
||||
|
||||
#define WINCON3_ALPHA_SEL (1 << 1)
|
||||
#define WINCON3_BPPMODE_MASK (0xf << 2)
|
||||
#define WINCON3_BPPMODE_SHIFT (2)
|
||||
#define WINCON3_BPPMODE_1BPP (0x0 << 2)
|
||||
#define WINCON3_BPPMODE_2BPP (0x1 << 2)
|
||||
#define WINCON3_BPPMODE_4BPP (0x2 << 2)
|
||||
#define WINCON3_BPPMODE_16BPP_565 (0x5 << 2)
|
||||
#define WINCON3_BPPMODE_16BPP_A1555 (0x6 << 2)
|
||||
#define WINCON3_BPPMODE_16BPP_I1555 (0x7 << 2)
|
||||
#define WINCON3_BPPMODE_18BPP_666 (0x8 << 2)
|
||||
#define WINCON3_BPPMODE_18BPP_A1665 (0x9 << 2)
|
||||
#define WINCON3_BPPMODE_19BPP_A1666 (0xa << 2)
|
||||
#define WINCON3_BPPMODE_24BPP_888 (0xb << 2)
|
||||
#define WINCON3_BPPMODE_24BPP_A1887 (0xc << 2)
|
||||
#define WINCON3_BPPMODE_25BPP_A1888 (0xd << 2)
|
||||
#define WINCON3_BPPMODE_28BPP_A4888 (0xd << 2)
|
||||
|
||||
#define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5)
|
||||
#define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5)
|
||||
#define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5)
|
||||
|
||||
#define DITHMODE (0x170)
|
||||
#define WINxMAP(_win) (0x180 + ((_win) * 4))
|
||||
|
||||
|
||||
#define DITHMODE_R_POS_MASK (0x3 << 5)
|
||||
#define DITHMODE_R_POS_SHIFT (5)
|
||||
#define DITHMODE_R_POS_8BIT (0x0 << 5)
|
||||
#define DITHMODE_R_POS_6BIT (0x1 << 5)
|
||||
#define DITHMODE_R_POS_5BIT (0x2 << 5)
|
||||
|
||||
#define DITHMODE_G_POS_MASK (0x3 << 3)
|
||||
#define DITHMODE_G_POS_SHIFT (3)
|
||||
#define DITHMODE_G_POS_8BIT (0x0 << 3)
|
||||
#define DITHMODE_G_POS_6BIT (0x1 << 3)
|
||||
#define DITHMODE_G_POS_5BIT (0x2 << 3)
|
||||
|
||||
#define DITHMODE_B_POS_MASK (0x3 << 1)
|
||||
#define DITHMODE_B_POS_SHIFT (1)
|
||||
#define DITHMODE_B_POS_8BIT (0x0 << 1)
|
||||
#define DITHMODE_B_POS_6BIT (0x1 << 1)
|
||||
#define DITHMODE_B_POS_5BIT (0x2 << 1)
|
||||
|
||||
#define DITHMODE_DITH_EN (1 << 0)
|
||||
|
||||
#define WPALCON (0x1A0)
|
||||
|
||||
/* Palette control */
|
||||
/* Note for S5PC100: you can still use those macros on WPALCON (aka WPALCON_L),
|
||||
* but make sure that WPALCON_H W2PAL-W4PAL entries are zeroed out */
|
||||
#define WPALCON_W4PAL_16BPP_A555 (1 << 8)
|
||||
#define WPALCON_W3PAL_16BPP_A555 (1 << 7)
|
||||
#define WPALCON_W2PAL_16BPP_A555 (1 << 6)
|
||||
|
||||
|
||||
/* system specific implementation code for palette sizes, and other
|
||||
* information that changes depending on which architecture is being
|
||||
* compiled.
|
||||
*/
|
||||
|
||||
/* return true if window _win has OSD register D */
|
||||
#define s3c_fb_has_osd_d(_win) ((_win) != 4 && (_win) != 0)
|
||||
|
||||
static inline unsigned int s3c_fb_win_pal_size(unsigned int win)
|
||||
{
|
||||
if (win < 2)
|
||||
return 256;
|
||||
if (win < 4)
|
||||
return 16;
|
||||
if (win == 4)
|
||||
return 4;
|
||||
|
||||
BUG(); /* shouldn't get here */
|
||||
}
|
||||
|
||||
static inline int s3c_fb_validate_win_bpp(unsigned int win, unsigned int bpp)
|
||||
{
|
||||
/* all windows can do 1/2 bpp */
|
||||
|
||||
if ((bpp == 25 || bpp == 19) && win == 0)
|
||||
return 0; /* win 0 does not have 19 or 25bpp modes */
|
||||
|
||||
if (bpp == 4 && win == 4)
|
||||
return 0;
|
||||
|
||||
if (bpp == 8 && (win >= 3))
|
||||
return 0; /* win 3/4 cannot do 8bpp in any mode */
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static inline int s3c_fb_pal_is16(unsigned int window)
|
||||
{
|
||||
return window > 1;
|
||||
}
|
||||
|
||||
struct s3c_fb_palette {
|
||||
struct fb_bitfield r;
|
||||
struct fb_bitfield g;
|
||||
struct fb_bitfield b;
|
||||
struct fb_bitfield a;
|
||||
};
|
||||
|
||||
static inline void s3c_fb_init_palette(unsigned int window,
|
||||
struct s3c_fb_palette *palette)
|
||||
{
|
||||
if (window < 2) {
|
||||
/* Windows 0/1 are 8/8/8 or A/8/8/8 */
|
||||
palette->r.offset = 16;
|
||||
palette->r.length = 8;
|
||||
palette->g.offset = 8;
|
||||
palette->g.length = 8;
|
||||
palette->b.offset = 0;
|
||||
palette->b.length = 8;
|
||||
} else {
|
||||
/* currently we assume RGB 5/6/5 */
|
||||
palette->r.offset = 11;
|
||||
palette->r.length = 5;
|
||||
palette->g.offset = 5;
|
||||
palette->g.length = 6;
|
||||
palette->b.offset = 0;
|
||||
palette->b.length = 5;
|
||||
}
|
||||
}
|
||||
|
||||
/* Notes on per-window bpp settings
|
||||
*
|
||||
* Value Win0 Win1 Win2 Win3 Win 4
|
||||
* 0000 1(P) 1(P) 1(P) 1(P) 1(P)
|
||||
* 0001 2(P) 2(P) 2(P) 2(P) 2(P)
|
||||
* 0010 4(P) 4(P) 4(P) 4(P) -none-
|
||||
* 0011 8(P) 8(P) -none- -none- -none-
|
||||
* 0100 -none- 8(A232) 8(A232) -none- -none-
|
||||
* 0101 16(565) 16(565) 16(565) 16(565) 16(565)
|
||||
* 0110 -none- 16(A555) 16(A555) 16(A555) 16(A555)
|
||||
* 0111 16(I555) 16(I565) 16(I555) 16(I555) 16(I555)
|
||||
* 1000 18(666) 18(666) 18(666) 18(666) 18(666)
|
||||
* 1001 -none- 18(A665) 18(A665) 18(A665) 16(A665)
|
||||
* 1010 -none- 19(A666) 19(A666) 19(A666) 19(A666)
|
||||
* 1011 24(888) 24(888) 24(888) 24(888) 24(888)
|
||||
* 1100 -none- 24(A887) 24(A887) 24(A887) 24(A887)
|
||||
* 1101 -none- 25(A888) 25(A888) 25(A888) 25(A888)
|
||||
* 1110 -none- -none- -none- -none- -none-
|
||||
* 1111 -none- -none- -none- -none- -none-
|
||||
*/
|
||||
@@ -1,7 +1,7 @@
|
||||
/* arch/arm/mach-s3c2410/include/mach/regs-nand.h
|
||||
*
|
||||
* Copyright (c) 2004,2005 Simtec Electronics <linux@simtec.co.uk>
|
||||
* http://www.simtec.co.uk/products/SWLINUX/
|
||||
* Copyright (c) 2004-2005 Simtec Electronics <linux@simtec.co.uk>
|
||||
* http://www.simtec.co.uk/products/SWLINUX/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
*
|
||||
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
|
||||
*
|
||||
* Additional defines, (c) 2003 Simtec Electronics (linux@simtec.co.uk)
|
||||
* Additional defines, Copyright 2003 Simtec Electronics (linux@simtec.co.uk)
|
||||
*
|
||||
* Adapted from:
|
||||
*
|
||||
|
||||
@@ -57,6 +57,7 @@ struct s3c_sdhci_platdata {
|
||||
*/
|
||||
extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd);
|
||||
extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
|
||||
extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd);
|
||||
|
||||
/* Default platform data, exported so that per-cpu initialisation can
|
||||
* set the correct one when there are more than one cpu type selected.
|
||||
@@ -64,11 +65,16 @@ extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
|
||||
|
||||
extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata;
|
||||
extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
|
||||
extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata;
|
||||
|
||||
/* Helper function availablity */
|
||||
|
||||
extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
|
||||
extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
|
||||
extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
|
||||
extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
|
||||
extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
|
||||
extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
|
||||
|
||||
/* S3C6400 SDHCI setup */
|
||||
|
||||
@@ -103,6 +109,17 @@ static inline void s3c6400_default_sdhci1(void)
|
||||
static inline void s3c6400_default_sdhci1(void) { }
|
||||
#endif /* CONFIG_S3C_DEV_HSMMC1 */
|
||||
|
||||
#ifdef CONFIG_S3C_DEV_HSMMC2
|
||||
static inline void s3c6400_default_sdhci2(void)
|
||||
{
|
||||
s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
|
||||
s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
|
||||
s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
|
||||
}
|
||||
#else
|
||||
static inline void s3c6400_default_sdhci2(void) { }
|
||||
#endif /* CONFIG_S3C_DEV_HSMMC2 */
|
||||
|
||||
#else
|
||||
static inline void s3c6400_default_sdhci0(void) { }
|
||||
static inline void s3c6400_default_sdhci1(void) { }
|
||||
@@ -140,9 +157,70 @@ static inline void s3c6410_default_sdhci1(void)
|
||||
static inline void s3c6410_default_sdhci1(void) { }
|
||||
#endif /* CONFIG_S3C_DEV_HSMMC1 */
|
||||
|
||||
#ifdef CONFIG_S3C_DEV_HSMMC2
|
||||
static inline void s3c6410_default_sdhci2(void)
|
||||
{
|
||||
s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
|
||||
s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
|
||||
s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
|
||||
}
|
||||
#else
|
||||
static inline void s3c6410_default_sdhci2(void) { }
|
||||
#endif /* CONFIG_S3C_DEV_HSMMC2 */
|
||||
|
||||
#else
|
||||
static inline void s3c6410_default_sdhci0(void) { }
|
||||
static inline void s3c6410_default_sdhci1(void) { }
|
||||
#endif /* CONFIG_S3C6410_SETUP_SDHCI */
|
||||
|
||||
/* S5PC100 SDHCI setup */
|
||||
|
||||
#ifdef CONFIG_S5PC100_SETUP_SDHCI
|
||||
extern char *s5pc100_hsmmc_clksrcs[4];
|
||||
|
||||
extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev,
|
||||
void __iomem *r,
|
||||
struct mmc_ios *ios,
|
||||
struct mmc_card *card);
|
||||
|
||||
#ifdef CONFIG_S3C_DEV_HSMMC
|
||||
static inline void s5pc100_default_sdhci0(void)
|
||||
{
|
||||
s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
|
||||
s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio;
|
||||
s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
|
||||
}
|
||||
#else
|
||||
static inline void s5pc100_default_sdhci0(void) { }
|
||||
#endif /* CONFIG_S3C_DEV_HSMMC */
|
||||
|
||||
#ifdef CONFIG_S3C_DEV_HSMMC1
|
||||
static inline void s5pc100_default_sdhci1(void)
|
||||
{
|
||||
s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
|
||||
s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio;
|
||||
s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
|
||||
}
|
||||
#else
|
||||
static inline void s5pc100_default_sdhci1(void) { }
|
||||
#endif /* CONFIG_S3C_DEV_HSMMC1 */
|
||||
|
||||
#ifdef CONFIG_S3C_DEV_HSMMC2
|
||||
static inline void s5pc100_default_sdhci2(void)
|
||||
{
|
||||
s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
|
||||
s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio;
|
||||
s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
|
||||
}
|
||||
#else
|
||||
static inline void s5pc100_default_sdhci2(void) { }
|
||||
#endif /* CONFIG_S3C_DEV_HSMMC1 */
|
||||
|
||||
|
||||
#else
|
||||
static inline void s5pc100_default_sdhci0(void) { }
|
||||
static inline void s5pc100_default_sdhci1(void) { }
|
||||
static inline void s5pc100_default_sdhci2(void) { }
|
||||
#endif /* CONFIG_S5PC100_SETUP_SDHCI */
|
||||
|
||||
#endif /* __PLAT_S3C_SDHCI_H */
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/* linux/arch/arm/plat-s3c/pm-check.c
|
||||
* originally in linux/arch/arm/plat-s3c24xx/pm.c
|
||||
*
|
||||
* Copyright (c) 2004,2006,2008 Simtec Electronics
|
||||
* Copyright (c) 2004-2008 Simtec Electronics
|
||||
* http://armlinux.simtec.co.uk
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/* linux/arch/arm/plat-s3c/pm.c
|
||||
*
|
||||
* Copyright 2008 Openmoko, Inc.
|
||||
* Copyright 2004,2006,2008 Simtec Electronics
|
||||
* Copyright 2004-2008 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* http://armlinux.simtec.co.uk/
|
||||
*
|
||||
|
||||
Reference in New Issue
Block a user