bnxt_en: Expand bnxt_tpa_info struct to support 57500 chips.
Add an aggregation array to bnxt_tpa_info struct to keep track of the aggregation completions. The aggregation completions are not completed at the TPA_END completion on 57500 chips so we need to keep track of them. The array is only allocated on the new chips when required. An agg_count field is also added to keep track of the number of these completions. The maximum concurrent TPA is now discovered from firmware instead of the hardcoded 64. Add a new bp->max_tpa to keep track of maximum configured TPA. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:

committed by
David S. Miller

parent
4a228a3a5e
commit
79632e9ba3
@@ -2333,7 +2333,7 @@ static void bnxt_free_rx_skbs(struct bnxt *bp)
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int j;
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int j;
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if (rxr->rx_tpa) {
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if (rxr->rx_tpa) {
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for (j = 0; j < MAX_TPA; j++) {
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for (j = 0; j < bp->max_tpa; j++) {
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struct bnxt_tpa_info *tpa_info =
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struct bnxt_tpa_info *tpa_info =
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&rxr->rx_tpa[j];
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&rxr->rx_tpa[j];
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u8 *data = tpa_info->data;
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u8 *data = tpa_info->data;
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@@ -2495,6 +2495,10 @@ static void bnxt_free_tpa_info(struct bnxt *bp)
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for (i = 0; i < bp->rx_nr_rings; i++) {
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for (i = 0; i < bp->rx_nr_rings; i++) {
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struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];
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struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];
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if (rxr->rx_tpa) {
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kfree(rxr->rx_tpa[0].agg_arr);
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rxr->rx_tpa[0].agg_arr = NULL;
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}
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kfree(rxr->rx_tpa);
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kfree(rxr->rx_tpa);
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rxr->rx_tpa = NULL;
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rxr->rx_tpa = NULL;
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}
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}
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@@ -2502,15 +2506,33 @@ static void bnxt_free_tpa_info(struct bnxt *bp)
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static int bnxt_alloc_tpa_info(struct bnxt *bp)
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static int bnxt_alloc_tpa_info(struct bnxt *bp)
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{
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{
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int i;
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int i, j, total_aggs = 0;
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bp->max_tpa = MAX_TPA;
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if (bp->flags & BNXT_FLAG_CHIP_P5) {
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if (!bp->max_tpa_v2)
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return 0;
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bp->max_tpa = max_t(u16, bp->max_tpa_v2, MAX_TPA_P5);
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total_aggs = bp->max_tpa * MAX_SKB_FRAGS;
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}
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for (i = 0; i < bp->rx_nr_rings; i++) {
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for (i = 0; i < bp->rx_nr_rings; i++) {
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struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];
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struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];
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struct rx_agg_cmp *agg;
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rxr->rx_tpa = kcalloc(MAX_TPA, sizeof(struct bnxt_tpa_info),
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rxr->rx_tpa = kcalloc(bp->max_tpa, sizeof(struct bnxt_tpa_info),
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GFP_KERNEL);
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GFP_KERNEL);
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if (!rxr->rx_tpa)
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if (!rxr->rx_tpa)
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return -ENOMEM;
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return -ENOMEM;
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if (!(bp->flags & BNXT_FLAG_CHIP_P5))
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continue;
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agg = kcalloc(total_aggs, sizeof(*agg), GFP_KERNEL);
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rxr->rx_tpa[0].agg_arr = agg;
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if (!agg)
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return -ENOMEM;
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for (j = 1; j < bp->max_tpa; j++)
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rxr->rx_tpa[j].agg_arr = agg + j * MAX_SKB_FRAGS;
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}
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}
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return 0;
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return 0;
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}
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}
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@@ -2974,7 +2996,7 @@ static int bnxt_init_one_rx_ring(struct bnxt *bp, int ring_nr)
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u8 *data;
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u8 *data;
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dma_addr_t mapping;
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dma_addr_t mapping;
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for (i = 0; i < MAX_TPA; i++) {
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for (i = 0; i < bp->max_tpa; i++) {
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data = __bnxt_alloc_rx_data(bp, &mapping,
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data = __bnxt_alloc_rx_data(bp, &mapping,
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GFP_KERNEL);
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GFP_KERNEL);
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if (!data)
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if (!data)
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@@ -4435,6 +4457,7 @@ static int bnxt_hwrm_clear_vnic_filter(struct bnxt *bp)
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static int bnxt_hwrm_vnic_set_tpa(struct bnxt *bp, u16 vnic_id, u32 tpa_flags)
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static int bnxt_hwrm_vnic_set_tpa(struct bnxt *bp, u16 vnic_id, u32 tpa_flags)
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{
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{
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struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id];
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struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id];
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u16 max_aggs = VNIC_TPA_CFG_REQ_MAX_AGGS_MAX;
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struct hwrm_vnic_tpa_cfg_input req = {0};
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struct hwrm_vnic_tpa_cfg_input req = {0};
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if (vnic->fw_vnic_id == INVALID_HW_RING_ID)
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if (vnic->fw_vnic_id == INVALID_HW_RING_ID)
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@@ -4474,9 +4497,14 @@ static int bnxt_hwrm_vnic_set_tpa(struct bnxt *bp, u16 vnic_id, u32 tpa_flags)
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nsegs = (MAX_SKB_FRAGS - n) / n;
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nsegs = (MAX_SKB_FRAGS - n) / n;
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}
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}
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segs = ilog2(nsegs);
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if (bp->flags & BNXT_FLAG_CHIP_P5) {
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segs = MAX_TPA_SEGS_P5;
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max_aggs = bp->max_tpa;
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} else {
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segs = ilog2(nsegs);
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}
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req.max_agg_segs = cpu_to_le16(segs);
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req.max_agg_segs = cpu_to_le16(segs);
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req.max_aggs = cpu_to_le16(VNIC_TPA_CFG_REQ_MAX_AGGS_MAX);
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req.max_aggs = cpu_to_le16(max_aggs);
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req.min_agg_len = cpu_to_le32(512);
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req.min_agg_len = cpu_to_le32(512);
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}
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}
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@@ -4836,6 +4864,7 @@ static int bnxt_hwrm_vnic_qcaps(struct bnxt *bp)
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if (flags &
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if (flags &
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VNIC_QCAPS_RESP_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_CAP)
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VNIC_QCAPS_RESP_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_CAP)
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bp->flags |= BNXT_FLAG_ROCE_MIRROR_CAP;
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bp->flags |= BNXT_FLAG_ROCE_MIRROR_CAP;
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bp->max_tpa_v2 = le16_to_cpu(resp->max_aggs_supported);
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}
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}
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mutex_unlock(&bp->hwrm_cmd_lock);
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mutex_unlock(&bp->hwrm_cmd_lock);
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return rc;
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return rc;
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@@ -554,6 +554,8 @@ struct nqe_cn {
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#define BNXT_DEFAULT_TX_RING_SIZE 511
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#define BNXT_DEFAULT_TX_RING_SIZE 511
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#define MAX_TPA 64
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#define MAX_TPA 64
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#define MAX_TPA_P5 256
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#define MAX_TPA_SEGS_P5 0x3f
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#if (BNXT_PAGE_SHIFT == 16)
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#if (BNXT_PAGE_SHIFT == 16)
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#define MAX_RX_PAGES 1
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#define MAX_RX_PAGES 1
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@@ -835,6 +837,8 @@ struct bnxt_tpa_info {
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((hdr_info) & 0x1ff)
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((hdr_info) & 0x1ff)
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u16 cfa_code; /* cfa_code in TPA start compl */
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u16 cfa_code; /* cfa_code in TPA start compl */
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u8 agg_count;
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struct rx_agg_cmp *agg_arr;
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};
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};
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struct bnxt_rx_ring_info {
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struct bnxt_rx_ring_info {
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@@ -1481,6 +1485,8 @@ struct bnxt {
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u16, void *, u8 *, dma_addr_t,
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u16, void *, u8 *, dma_addr_t,
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unsigned int);
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unsigned int);
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u16 max_tpa_v2;
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u16 max_tpa;
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u32 rx_buf_size;
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u32 rx_buf_size;
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u32 rx_buf_use_size; /* useable size */
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u32 rx_buf_use_size; /* useable size */
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u16 rx_offset;
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u16 rx_offset;
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