Merge branch 'i2c/for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang: - Peter Rosin did some major rework on the locking of i2c muxes by seperating parent-locked muxes and mux-locked muxes. This avoids deadlocks/workarounds when the mux itself needs i2c commands for muxing. And as a side-effect, other workarounds in the media layer could be eliminated. Also, Peter stepped up as the i2c mux maintainer and will keep an eye on these changes. - major updates to the octeon driver - add a helper to the core to generate the address+rw_bit octal and make drivers use it - quite a bunch of driver updates * 'i2c/for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (84 commits) i2c: rcar: add DMA support i2c: st: Implement bus clear i2c: only check scl functions when using generic recovery i2c: algo-bit: declare i2c_bit_quirk_no_clk_stretch as static i2c: tegra: disable clock before returning error [media] rtl2832: regmap is aware of lockdep, drop local locking hack [media] rtl2832_sdr: get rid of empty regmap wrappers [media] rtl2832: change the i2c gate to be mux-locked [media] si2168: change the i2c gate to be mux-locked iio: imu: inv_mpu6050: change the i2c gate to be mux-locked i2c: mux: document i2c muxes and elaborate on parent-/mux-locked muxes i2c: mux: relax locking of the top i2c adapter during mux-locked muxing i2c: muxes always lock the parent adapter i2c: allow adapter drivers to override the adapter locking i2c: uniphier: add "\n" at the end of error log i2c: mv64xxx: remove CONFIG_HAVE_CLK conditionals i2c: mv64xxx: use clk_{prepare_enable,disable_unprepare} i2c: mv64xxx: handle probe deferral for the clock i2c: mv64xxx: enable the driver on ARCH_MVEBU i2c: octeon: Add workaround for broken irqs on CN3860 ...
This commit is contained in:
@@ -101,10 +101,7 @@ struct rk3x_i2c {
|
||||
struct notifier_block clk_rate_nb;
|
||||
|
||||
/* Settings */
|
||||
unsigned int scl_frequency;
|
||||
unsigned int scl_rise_ns;
|
||||
unsigned int scl_fall_ns;
|
||||
unsigned int sda_fall_ns;
|
||||
struct i2c_timings t;
|
||||
|
||||
/* Synchronization & notification */
|
||||
spinlock_t lock;
|
||||
@@ -437,10 +434,7 @@ out:
|
||||
* Calculate divider values for desired SCL frequency
|
||||
*
|
||||
* @clk_rate: I2C input clock rate
|
||||
* @scl_rate: Desired SCL rate
|
||||
* @scl_rise_ns: How many ns it takes for SCL to rise.
|
||||
* @scl_fall_ns: How many ns it takes for SCL to fall.
|
||||
* @sda_fall_ns: How many ns it takes for SDA to fall.
|
||||
* @t: Known I2C timing information.
|
||||
* @div_low: Divider output for low
|
||||
* @div_high: Divider output for high
|
||||
*
|
||||
@@ -448,11 +442,10 @@ out:
|
||||
* a best-effort divider value is returned in divs. If the target rate is
|
||||
* too high, we silently use the highest possible rate.
|
||||
*/
|
||||
static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
|
||||
unsigned long scl_rise_ns,
|
||||
unsigned long scl_fall_ns,
|
||||
unsigned long sda_fall_ns,
|
||||
unsigned long *div_low, unsigned long *div_high)
|
||||
static int rk3x_i2c_calc_divs(unsigned long clk_rate,
|
||||
struct i2c_timings *t,
|
||||
unsigned long *div_low,
|
||||
unsigned long *div_high)
|
||||
{
|
||||
unsigned long spec_min_low_ns, spec_min_high_ns;
|
||||
unsigned long spec_setup_start, spec_max_data_hold_ns;
|
||||
@@ -472,12 +465,12 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
|
||||
int ret = 0;
|
||||
|
||||
/* Only support standard-mode and fast-mode */
|
||||
if (WARN_ON(scl_rate > 400000))
|
||||
scl_rate = 400000;
|
||||
if (WARN_ON(t->bus_freq_hz > 400000))
|
||||
t->bus_freq_hz = 400000;
|
||||
|
||||
/* prevent scl_rate_khz from becoming 0 */
|
||||
if (WARN_ON(scl_rate < 1000))
|
||||
scl_rate = 1000;
|
||||
if (WARN_ON(t->bus_freq_hz < 1000))
|
||||
t->bus_freq_hz = 1000;
|
||||
|
||||
/*
|
||||
* min_low_ns: The minimum number of ns we need to hold low to
|
||||
@@ -491,7 +484,7 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
|
||||
* This is because the i2c host on Rockchip holds the data line
|
||||
* for half the low time.
|
||||
*/
|
||||
if (scl_rate <= 100000) {
|
||||
if (t->bus_freq_hz <= 100000) {
|
||||
/* Standard-mode */
|
||||
spec_min_low_ns = 4700;
|
||||
spec_setup_start = 4700;
|
||||
@@ -506,7 +499,7 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
|
||||
spec_max_data_hold_ns = 900;
|
||||
data_hold_buffer_ns = 50;
|
||||
}
|
||||
min_high_ns = scl_rise_ns + spec_min_high_ns;
|
||||
min_high_ns = t->scl_rise_ns + spec_min_high_ns;
|
||||
|
||||
/*
|
||||
* Timings for repeated start:
|
||||
@@ -517,18 +510,18 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
|
||||
* we meet tSU;STA and tHD;STA times.
|
||||
*/
|
||||
min_high_ns = max(min_high_ns,
|
||||
DIV_ROUND_UP((scl_rise_ns + spec_setup_start) * 1000, 875));
|
||||
DIV_ROUND_UP((t->scl_rise_ns + spec_setup_start) * 1000, 875));
|
||||
min_high_ns = max(min_high_ns,
|
||||
DIV_ROUND_UP((scl_rise_ns + spec_setup_start +
|
||||
sda_fall_ns + spec_min_high_ns), 2));
|
||||
DIV_ROUND_UP((t->scl_rise_ns + spec_setup_start +
|
||||
t->sda_fall_ns + spec_min_high_ns), 2));
|
||||
|
||||
min_low_ns = scl_fall_ns + spec_min_low_ns;
|
||||
min_low_ns = t->scl_fall_ns + spec_min_low_ns;
|
||||
max_low_ns = spec_max_data_hold_ns * 2 - data_hold_buffer_ns;
|
||||
min_total_ns = min_low_ns + min_high_ns;
|
||||
|
||||
/* Adjust to avoid overflow */
|
||||
clk_rate_khz = DIV_ROUND_UP(clk_rate, 1000);
|
||||
scl_rate_khz = scl_rate / 1000;
|
||||
scl_rate_khz = t->bus_freq_hz / 1000;
|
||||
|
||||
/*
|
||||
* We need the total div to be >= this number
|
||||
@@ -616,14 +609,13 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
|
||||
|
||||
static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate)
|
||||
{
|
||||
struct i2c_timings *t = &i2c->t;
|
||||
unsigned long div_low, div_high;
|
||||
u64 t_low_ns, t_high_ns;
|
||||
int ret;
|
||||
|
||||
ret = rk3x_i2c_calc_divs(clk_rate, i2c->scl_frequency, i2c->scl_rise_ns,
|
||||
i2c->scl_fall_ns, i2c->sda_fall_ns,
|
||||
&div_low, &div_high);
|
||||
WARN_ONCE(ret != 0, "Could not reach SCL freq %u", i2c->scl_frequency);
|
||||
ret = rk3x_i2c_calc_divs(clk_rate, t, &div_low, &div_high);
|
||||
WARN_ONCE(ret != 0, "Could not reach SCL freq %u", t->bus_freq_hz);
|
||||
|
||||
clk_enable(i2c->clk);
|
||||
i2c_writel(i2c, (div_high << 16) | (div_low & 0xffff), REG_CLKDIV);
|
||||
@@ -634,7 +626,7 @@ static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate)
|
||||
dev_dbg(i2c->dev,
|
||||
"CLK %lukhz, Req %uns, Act low %lluns high %lluns\n",
|
||||
clk_rate / 1000,
|
||||
1000000000 / i2c->scl_frequency,
|
||||
1000000000 / t->bus_freq_hz,
|
||||
t_low_ns, t_high_ns);
|
||||
}
|
||||
|
||||
@@ -664,9 +656,7 @@ static int rk3x_i2c_clk_notifier_cb(struct notifier_block *nb, unsigned long
|
||||
|
||||
switch (event) {
|
||||
case PRE_RATE_CHANGE:
|
||||
if (rk3x_i2c_calc_divs(ndata->new_rate, i2c->scl_frequency,
|
||||
i2c->scl_rise_ns, i2c->scl_fall_ns,
|
||||
i2c->sda_fall_ns,
|
||||
if (rk3x_i2c_calc_divs(ndata->new_rate, &i2c->t,
|
||||
&div_low, &div_high) != 0)
|
||||
return NOTIFY_STOP;
|
||||
|
||||
@@ -880,37 +870,8 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
|
||||
match = of_match_node(rk3x_i2c_match, np);
|
||||
i2c->soc_data = (struct rk3x_i2c_soc_data *)match->data;
|
||||
|
||||
if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
|
||||
&i2c->scl_frequency)) {
|
||||
dev_info(&pdev->dev, "using default SCL frequency: %d\n",
|
||||
DEFAULT_SCL_RATE);
|
||||
i2c->scl_frequency = DEFAULT_SCL_RATE;
|
||||
}
|
||||
|
||||
if (i2c->scl_frequency == 0 || i2c->scl_frequency > 400 * 1000) {
|
||||
dev_warn(&pdev->dev, "invalid SCL frequency specified.\n");
|
||||
dev_warn(&pdev->dev, "using default SCL frequency: %d\n",
|
||||
DEFAULT_SCL_RATE);
|
||||
i2c->scl_frequency = DEFAULT_SCL_RATE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Read rise and fall time from device tree. If not available use
|
||||
* the default maximum timing from the specification.
|
||||
*/
|
||||
if (of_property_read_u32(pdev->dev.of_node, "i2c-scl-rising-time-ns",
|
||||
&i2c->scl_rise_ns)) {
|
||||
if (i2c->scl_frequency <= 100000)
|
||||
i2c->scl_rise_ns = 1000;
|
||||
else
|
||||
i2c->scl_rise_ns = 300;
|
||||
}
|
||||
if (of_property_read_u32(pdev->dev.of_node, "i2c-scl-falling-time-ns",
|
||||
&i2c->scl_fall_ns))
|
||||
i2c->scl_fall_ns = 300;
|
||||
if (of_property_read_u32(pdev->dev.of_node, "i2c-sda-falling-time-ns",
|
||||
&i2c->sda_fall_ns))
|
||||
i2c->sda_fall_ns = i2c->scl_fall_ns;
|
||||
/* use common interface to get I2C timing properties */
|
||||
i2c_parse_fw_timings(&pdev->dev, &i2c->t, true);
|
||||
|
||||
strlcpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name));
|
||||
i2c->adap.owner = THIS_MODULE;
|
||||
|
Reference in New Issue
Block a user