ARM: tegra: apalis_t30: annotate/clean-up pcie controller/port nodes
Annotate PCIe port nodes and clean-up PCIe controller/port status' with respect to carrier board vs. module level device trees. As port 3 connects to the on-module Gigabit Ethernet MACPHY it is always enabled together with the PCIe controller itself. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:

committed by
Thierry Reding

parent
4f6b07a278
commit
7890d7856a
@@ -23,8 +23,6 @@
|
||||
};
|
||||
|
||||
pcie@3000 {
|
||||
status = "okay";
|
||||
|
||||
pci@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -32,10 +30,6 @@
|
||||
pci@2,0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pci@3,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
host1x@50000000 {
|
||||
|
Reference in New Issue
Block a user