Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where
things come together.
We get a DT descriptions for a couple of new SoCs, all of them
variants of other chips we already support, and usually coming with a
new evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers or
industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it
into products and have served their purpose in the kernel as a
template for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
arm: dts: zynq: Add MicroZed board support
ARM: dts: da850: enable high speed for mmc
ARM: dts: da850: Add node for pullup/pulldown pinconf
ARM: dts: da850: enable memctrl and mstpri nodes per board
ARM: dts: da850-lcdk: Add ethernet0 alias to DT
ARM: dts: artpec: add pcie support
ARM: dts: add support for Turris Omnia
devicetree: Add vendor prefix for CZ.NIC
ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
ARM: dts: berlin2q-marvell-dmp: fix regulators' name
ARM: dts: Add xo to sdhc clock node on qcom platforms
ARM: dts: r8a7794: Add device node for PRR
ARM: dts: r8a7793: Add device node for PRR
ARM: dts: r8a7792: Add device node for PRR
ARM: dts: r8a7791: Add device node for PRR
ARM: dts: r8a7790: Add device node for PRR
ARM: dts: r8a7779: Add device node for PRR
ARM: dts: r8a73a4: Add device node for PRR
ARM: dts: sk-rzg1e: add Ether support
ARM: dts: sk-rzg1e: initial device tree
...
Цей коміт міститься в:
Linus Torvalds
@@ -75,6 +75,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
|
||||
bcm4708-asus-rt-ac56u.dtb \
|
||||
bcm4708-asus-rt-ac68u.dtb \
|
||||
bcm4708-buffalo-wzr-1750dhp.dtb \
|
||||
bcm4708-luxul-xap-1510.dtb \
|
||||
bcm4708-luxul-xwc-1000.dtb \
|
||||
bcm4708-netgear-r6250.dtb \
|
||||
bcm4708-netgear-r6300-v2.dtb \
|
||||
@@ -86,11 +87,16 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
|
||||
bcm4709-buffalo-wxr-1900dhp.dtb \
|
||||
bcm4709-netgear-r7000.dtb \
|
||||
bcm4709-netgear-r8000.dtb \
|
||||
bcm4709-tplink-archer-c9-v1.dtb \
|
||||
bcm47094-dlink-dir-885l.dtb \
|
||||
bcm47094-luxul-xwr-3100.dtb \
|
||||
bcm47094-netgear-r8500.dtb \
|
||||
bcm94708.dtb \
|
||||
bcm94709.dtb \
|
||||
bcm953012er.dtb \
|
||||
bcm953012k.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_53573) += \
|
||||
bcm47189-tenda-ac9.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_63XX) += \
|
||||
bcm963138dvt.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \
|
||||
@@ -136,6 +142,7 @@ dtb-$(CONFIG_ARCH_EXYNOS4) += \
|
||||
exynos4210-smdkv310.dtb \
|
||||
exynos4210-trats.dtb \
|
||||
exynos4210-universal_c210.dtb \
|
||||
exynos4412-itop-elite.dtb \
|
||||
exynos4412-odroidu3.dtb \
|
||||
exynos4412-odroidx.dtb \
|
||||
exynos4412-odroidx2.dtb \
|
||||
@@ -330,6 +337,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-aristainetos_7.dtb \
|
||||
imx6dl-aristainetos2_4.dtb \
|
||||
imx6dl-aristainetos2_7.dtb \
|
||||
imx6dl-colibri-eval-v3.dtb \
|
||||
imx6dl-cubox-i.dtb \
|
||||
imx6dl-dfi-fs700-m60.dtb \
|
||||
imx6dl-gw51xx.dtb \
|
||||
@@ -340,6 +348,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-gw552x.dtb \
|
||||
imx6dl-gw553x.dtb \
|
||||
imx6dl-hummingboard.dtb \
|
||||
imx6dl-icore.dtb \
|
||||
imx6dl-nit6xlite.dtb \
|
||||
imx6dl-nitrogen6x.dtb \
|
||||
imx6dl-phytec-pbab01.dtb \
|
||||
@@ -381,10 +390,12 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6q-gw553x.dtb \
|
||||
imx6q-h100.dtb \
|
||||
imx6q-hummingboard.dtb \
|
||||
imx6q-icore.dtb \
|
||||
imx6q-icore-rqs.dtb \
|
||||
imx6q-marsboard.dtb \
|
||||
imx6q-nitrogen6x.dtb \
|
||||
imx6q-nitrogen6_max.dtb \
|
||||
imx6q-nitrogen6_som2.dtb \
|
||||
imx6q-novena.dtb \
|
||||
imx6q-phytec-pbab01.dtb \
|
||||
imx6q-rex-pro.dtb \
|
||||
@@ -416,14 +427,19 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
|
||||
imx6sx-sabreauto.dtb \
|
||||
imx6sx-sdb-reva.dtb \
|
||||
imx6sx-sdb-sai.dtb \
|
||||
imx6sx-sdb.dtb
|
||||
imx6sx-sdb.dtb \
|
||||
imx6sx-udoo-neo-basic.dtb \
|
||||
imx6sx-udoo-neo-extended.dtb \
|
||||
imx6sx-udoo-neo-full.dtb
|
||||
dtb-$(CONFIG_SOC_IMX6UL) += \
|
||||
imx6ul-14x14-evk.dtb \
|
||||
imx6ul-geam-kit.dtb \
|
||||
imx6ul-liteboard.dtb \
|
||||
imx6ul-pico-hobbit.dtb \
|
||||
imx6ul-tx6ul-0010.dtb \
|
||||
imx6ul-tx6ul-0011.dtb \
|
||||
imx6ul-tx6ul-mainboard.dtb
|
||||
imx6ul-tx6ul-mainboard.dtb \
|
||||
imx6ull-14x14-evk.dtb
|
||||
dtb-$(CONFIG_SOC_IMX7D) += \
|
||||
imx7d-cl-som-imx7.dtb \
|
||||
imx7d-colibri-eval-v3.dtb \
|
||||
@@ -561,6 +577,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
|
||||
am335x-sl50.dtb \
|
||||
am335x-wega-rdk.dtb
|
||||
dtb-$(CONFIG_ARCH_OMAP4) += \
|
||||
omap4-droid4-xt894.dtb \
|
||||
omap4-duovero-parlor.dtb \
|
||||
omap4-kc1.dtb \
|
||||
omap4-panda.dtb \
|
||||
@@ -588,15 +605,18 @@ dtb-$(CONFIG_SOC_DRA7XX) += \
|
||||
am57xx-cl-som-am57x.dtb \
|
||||
am57xx-sbc-am57x.dtb \
|
||||
am572x-idk.dtb \
|
||||
am571x-idk.dtb \
|
||||
dra7-evm.dtb \
|
||||
dra72-evm.dtb \
|
||||
dra72-evm-revc.dtb
|
||||
dra72-evm-revc.dtb \
|
||||
dra71-evm.dtb
|
||||
dtb-$(CONFIG_ARCH_ORION5X) += \
|
||||
orion5x-kuroboxpro.dtb \
|
||||
orion5x-lacie-d2-network.dtb \
|
||||
orion5x-lacie-ethernet-disk-mini-v2.dtb \
|
||||
orion5x-linkstation-lsgl.dtb \
|
||||
orion5x-linkstation-lswtgl.dtb \
|
||||
orion5x-lschl.dtb \
|
||||
orion5x-lswsgl.dtb \
|
||||
orion5x-maxtor-shared-storage-2.dtb \
|
||||
orion5x-netgear-wnr854t.dtb \
|
||||
@@ -604,7 +624,8 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
|
||||
dtb-$(CONFIG_ARCH_PRIMA2) += \
|
||||
prima2-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_OXNAS) += \
|
||||
wd-mbwe.dtb
|
||||
wd-mbwe.dtb \
|
||||
cloudengines-pogoplug-series-3.dtb
|
||||
dtb-$(CONFIG_ARCH_QCOM) += \
|
||||
qcom-apq8060-dragonboard.dtb \
|
||||
qcom-apq8064-arrow-sd-600eval.dtb \
|
||||
@@ -620,7 +641,8 @@ dtb-$(CONFIG_ARCH_QCOM) += \
|
||||
qcom-msm8660-surf.dtb \
|
||||
qcom-msm8960-cdp.dtb \
|
||||
qcom-msm8974-lge-nexus5-hammerhead.dtb \
|
||||
qcom-msm8974-sony-xperia-honami.dtb
|
||||
qcom-msm8974-sony-xperia-honami.dtb \
|
||||
qcom-mdm9615-wp8548-mangoh-green.dtb
|
||||
dtb-$(CONFIG_ARCH_REALVIEW) += \
|
||||
arm-realview-pb1176.dtb \
|
||||
arm-realview-pb11mp.dtb \
|
||||
@@ -635,11 +657,14 @@ dtb-$(CONFIG_ARCH_REALVIEW) += \
|
||||
arm-realview-pba8.dtb \
|
||||
arm-realview-pbx-a9.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rk1108-evb.dtb \
|
||||
rk3036-evb.dtb \
|
||||
rk3036-kylin.dtb \
|
||||
rk3066a-bqcurie2.dtb \
|
||||
rk3066a-marsboard.dtb \
|
||||
rk3066a-mk808.dtb \
|
||||
rk3066a-rayeager.dtb \
|
||||
rk3188-px3-evb.dtb \
|
||||
rk3188-radxarock.dtb \
|
||||
rk3228-evb.dtb \
|
||||
rk3229-evb.dtb \
|
||||
@@ -677,6 +702,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
|
||||
r7s72100-rskrza1.dtb \
|
||||
r8a73a4-ape6evm.dtb \
|
||||
r8a7740-armadillo800eva.dtb \
|
||||
r8a7743-sk-rzg1m.dtb \
|
||||
r8a7745-sk-rzg1e.dtb \
|
||||
r8a7778-bockw.dtb \
|
||||
r8a7779-marzen.dtb \
|
||||
r8a7790-lager.dtb \
|
||||
@@ -690,12 +717,14 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
|
||||
sh73a0-kzm9g.dtb
|
||||
dtb-$(CONFIG_ARCH_SOCFPGA) += \
|
||||
socfpga_arria5_socdk.dtb \
|
||||
socfpga_arria10_socdk_qspi.dtb \
|
||||
socfpga_arria10_socdk_sdmmc.dtb \
|
||||
socfpga_cyclone5_mcvevk.dtb \
|
||||
socfpga_cyclone5_socdk.dtb \
|
||||
socfpga_cyclone5_de0_sockit.dtb \
|
||||
socfpga_cyclone5_sockit.dtb \
|
||||
socfpga_cyclone5_socrates.dtb \
|
||||
socfpga_cyclone5_sodia.dtb \
|
||||
socfpga_cyclone5_vining_fpga.dtb \
|
||||
socfpga_vt.dtb
|
||||
dtb-$(CONFIG_ARCH_SPEAR13XX) += \
|
||||
@@ -712,16 +741,12 @@ dtb-$(CONFIG_ARCH_STI) += \
|
||||
stih407-b2120.dtb \
|
||||
stih410-b2120.dtb \
|
||||
stih410-b2260.dtb \
|
||||
stih415-b2000.dtb \
|
||||
stih415-b2020.dtb \
|
||||
stih416-b2000.dtb \
|
||||
stih416-b2020.dtb \
|
||||
stih416-b2020e.dtb \
|
||||
stih418-b2199.dtb
|
||||
dtb-$(CONFIG_ARCH_STM32)+= \
|
||||
stm32f429-disco.dtb \
|
||||
stm32f469-disco.dtb \
|
||||
stm32429i-eval.dtb
|
||||
stm32429i-eval.dtb \
|
||||
stm32746g-eval.dtb
|
||||
dtb-$(CONFIG_MACH_SUN4I) += \
|
||||
sun4i-a10-a1000.dtb \
|
||||
sun4i-a10-ba10-tvbox.dtb \
|
||||
@@ -760,6 +785,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \
|
||||
sun5i-a13-olinuxino-micro.dtb \
|
||||
sun5i-a13-q8-tablet.dtb \
|
||||
sun5i-a13-utoo-p66.dtb \
|
||||
sun5i-gr8-chip-pro.dtb \
|
||||
sun5i-gr8-evb.dtb \
|
||||
sun5i-r8-chip.dtb
|
||||
dtb-$(CONFIG_MACH_SUN6I) += \
|
||||
@@ -897,6 +923,7 @@ dtb-$(CONFIG_ARCH_VT8500) += \
|
||||
wm8750-apc8750.dtb \
|
||||
wm8850-w70v2.dtb
|
||||
dtb-$(CONFIG_ARCH_ZYNQ) += \
|
||||
zynq-microzed.dtb \
|
||||
zynq-parallella.dtb \
|
||||
zynq-zc702.dtb \
|
||||
zynq-zc706.dtb \
|
||||
@@ -920,6 +947,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
|
||||
armada-385-db-ap.dtb \
|
||||
armada-385-linksys-caiman.dtb \
|
||||
armada-385-linksys-cobra.dtb \
|
||||
armada-385-turris-omnia.dtb \
|
||||
armada-388-clearfog.dtb \
|
||||
armada-388-db.dtb \
|
||||
armada-388-gp.dtb \
|
||||
|
||||
@@ -54,16 +54,22 @@
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "rmii";
|
||||
dual_emac_res_vlan = <1>;
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <7>;
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <2>;
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
|
||||
@@ -109,9 +109,9 @@
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <7>;
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <2>;
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
|
||||
@@ -114,7 +114,7 @@
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
dr_mode = "otg";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
@@ -127,9 +127,9 @@
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <7>;
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <2>;
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
|
||||
@@ -364,11 +364,14 @@
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||
|
||||
status = "okay";
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
@@ -406,3 +409,7 @@
|
||||
&gpio0 {
|
||||
ti,no-reset-on-init;
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
ti,no-reset-on-init;
|
||||
};
|
||||
|
||||
@@ -6,6 +6,8 @@
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/mfd/tps65217.h>
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
cpu@0 {
|
||||
@@ -310,8 +312,23 @@
|
||||
* by the hardware problems. (Tip: double-check by performing a current
|
||||
* measurement after shutdown: it should be less than 1 mA.)
|
||||
*/
|
||||
|
||||
interrupts = <7>; /* NMI */
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
ti,pmic-shutdown-controller;
|
||||
|
||||
charger {
|
||||
interrupts = <TPS65217_IRQ_AC>, <TPS65217_IRQ_USB>;
|
||||
interrupts-names = "AC", "USB";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pwrbutton {
|
||||
interrupts = <TPS65217_IRQ_PB>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
regulators {
|
||||
dcdc1_reg: regulator@0 {
|
||||
regulator-name = "vdds_dpr";
|
||||
@@ -393,3 +410,8 @@
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
|
||||
clock-names = "ext-clk", "int-clk";
|
||||
};
|
||||
|
||||
@@ -79,6 +79,14 @@
|
||||
|
||||
&lcdc {
|
||||
status = "okay";
|
||||
|
||||
/* If you want to get 24 bit RGB and 16 BGR mode instead of
|
||||
* current 16 bit RGB and 24 BGR modes, set the propety
|
||||
* below to "crossed" and uncomment the video-ports -property
|
||||
* in tda19988 node.
|
||||
*/
|
||||
blue-and-red-wiring = "straight";
|
||||
|
||||
port {
|
||||
lcdc_0: endpoint@0 {
|
||||
remote-endpoint = <&hdmi_0>;
|
||||
@@ -95,6 +103,9 @@
|
||||
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
|
||||
pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
|
||||
|
||||
/* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
|
||||
/* video-ports = <0x234501>; */
|
||||
|
||||
#sound-dai-cells = <0>;
|
||||
audio-ports = < TDA998x_I2S 0x03>;
|
||||
|
||||
|
||||
@@ -783,3 +783,8 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dcan1_pins_default>;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
|
||||
clock-names = "ext-clk", "int-clk";
|
||||
};
|
||||
|
||||
@@ -715,3 +715,8 @@
|
||||
|
||||
blue-and-red-wiring = "crossed";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
|
||||
clock-names = "ext-clk", "int-clk";
|
||||
};
|
||||
|
||||
@@ -43,52 +43,52 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
leds0 {
|
||||
leds-iio {
|
||||
status = "disabled";
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led0 {
|
||||
led-out0 {
|
||||
label = "out0";
|
||||
gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led1 {
|
||||
led-out1 {
|
||||
label = "out1";
|
||||
gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2 {
|
||||
led-out2 {
|
||||
label = "out2";
|
||||
gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led3 {
|
||||
led-out3 {
|
||||
label = "out3";
|
||||
gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led4 {
|
||||
led-out4 {
|
||||
label = "out4";
|
||||
gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led5 {
|
||||
led-out5 {
|
||||
label = "out5";
|
||||
gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led6 {
|
||||
led-out6 {
|
||||
label = "out6";
|
||||
gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led7 {
|
||||
led-out7 {
|
||||
label = "out7";
|
||||
gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
@@ -187,6 +187,8 @@
|
||||
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
|
||||
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
|
||||
AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0) /* (C15) spi0_cs1.spi0_cs1 */
|
||||
AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
|
||||
>;
|
||||
};
|
||||
|
||||
@@ -224,6 +226,31 @@
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins_default>;
|
||||
|
||||
sn65hvs882@1 {
|
||||
compatible = "pisosr-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
load-gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
|
||||
|
||||
reg = <1>;
|
||||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
};
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
adc {
|
||||
ti,adc-channels = <1 2 3 4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
#include "tps65910.dtsi"
|
||||
|
||||
&tps {
|
||||
|
||||
@@ -130,6 +130,7 @@
|
||||
reg = <0x210000 0x2000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#pinctrl-cells = <1>;
|
||||
ranges = <0 0x210000 0x2000>;
|
||||
|
||||
am33xx_pinmux: pinmux@800 {
|
||||
@@ -137,6 +138,7 @@
|
||||
reg = <0x800 0x238>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,function-mask = <0x7f>;
|
||||
};
|
||||
@@ -505,6 +507,8 @@
|
||||
interrupts = <75
|
||||
76>;
|
||||
ti,hwmods = "rtc";
|
||||
clocks = <&clkdiv32k_ick>;
|
||||
clock-names = "int-clk";
|
||||
};
|
||||
|
||||
spi0: spi@48030000 {
|
||||
@@ -855,6 +859,8 @@
|
||||
interrupts = <16>;
|
||||
ti,hwmods = "adc_tsc";
|
||||
status = "disabled";
|
||||
dmas = <&edma 53 0>, <&edma 57 0>;
|
||||
dma-names = "fifo0", "fifo1";
|
||||
|
||||
tsc {
|
||||
compatible = "ti,am3359-tsc";
|
||||
|
||||
@@ -66,6 +66,7 @@
|
||||
reg = <0x480025d8 0x24>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <16>;
|
||||
|
||||
@@ -189,6 +189,7 @@
|
||||
reg = <0x800 0x31c>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <32>;
|
||||
@@ -871,6 +872,8 @@
|
||||
clocks = <&adc_tsc_fck>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
dmas = <&edma 53 0>, <&edma 57 0>;
|
||||
dma-names = "fifo0", "fifo1";
|
||||
|
||||
tsc {
|
||||
compatible = "ti,am3359-tsc";
|
||||
|
||||
@@ -117,6 +117,58 @@
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
leds-iio {
|
||||
status = "disabled";
|
||||
compatible = "gpio-leds";
|
||||
led-out0 {
|
||||
label = "out0";
|
||||
gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out1 {
|
||||
label = "out1";
|
||||
gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out2 {
|
||||
label = "out2";
|
||||
gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out3 {
|
||||
label = "out3";
|
||||
gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out4 {
|
||||
label = "out4";
|
||||
gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out5 {
|
||||
label = "out5";
|
||||
gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out6 {
|
||||
label = "out6";
|
||||
gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out7 {
|
||||
label = "out7";
|
||||
gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&am43xx_pinmux {
|
||||
@@ -178,6 +230,24 @@
|
||||
>;
|
||||
};
|
||||
|
||||
spi1_pins_default: spi1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE2) /* mii1_col.spi1_sclk */
|
||||
AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE2) /* mii1_rx_er.spi1_d1 */
|
||||
AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2) /* rmii1_ref_clk.spi1_cs0 */
|
||||
AM4372_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE7) /* mii1_crs.gpio3_1 */
|
||||
>;
|
||||
};
|
||||
|
||||
spi1_pins_sleep: spi1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins_default: backlight_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
|
||||
@@ -290,6 +360,33 @@
|
||||
pinctrl-0 = <&i2c2_pins_default>;
|
||||
pinctrl-1 = <&i2c2_pins_sleep>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
tpic2810: tpic2810@60 {
|
||||
compatible = "ti,tpic2810";
|
||||
reg = <0x60>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&spi1_pins_default>;
|
||||
pinctrl-1 = <&spi1_pins_sleep>;
|
||||
ti,pindir-d0-out-d1-in;
|
||||
|
||||
sn65hvs882: sn65hvs882@0 {
|
||||
compatible = "pisosr-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
load-gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
|
||||
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
};
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
@@ -310,6 +407,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
81
arch/arm/boot/dts/am571x-idk.dts
Звичайний файл
81
arch/arm/boot/dts/am571x-idk.dts
Звичайний файл
@@ -0,0 +1,81 @@
|
||||
/*
|
||||
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "dra72x.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include "am57xx-idk-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI AM5718 IDK";
|
||||
compatible = "ti,am5718-idk", "ti,am5718", "ti,dra7";
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x0 0x40000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
cpu0-led {
|
||||
label = "status0:red:cpu0";
|
||||
gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "cpu0";
|
||||
};
|
||||
|
||||
usr0-led {
|
||||
label = "status0:green:usr";
|
||||
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
heartbeat-led {
|
||||
label = "status0:blue:heartbeat";
|
||||
gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
usr1-led {
|
||||
label = "status1:red:usr";
|
||||
gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
usr2-led {
|
||||
label = "status1:green:usr";
|
||||
gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
mmc0-led {
|
||||
label = "status1:blue:mmc0";
|
||||
gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
};
|
||||
|
||||
extcon_usb2: extcon_usb2 {
|
||||
compatible = "linux,extcon-usb-gpio";
|
||||
id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&ldo1_reg>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 27 0>; /* gpio 219 */
|
||||
};
|
||||
|
||||
&omap_dwc3_2 {
|
||||
extcon = <&extcon_usb2>;
|
||||
};
|
||||
@@ -83,3 +83,7 @@
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 27 0>; /* gpio 219 */
|
||||
};
|
||||
|
||||
&sn65hvs882 {
|
||||
load-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
@@ -204,6 +204,7 @@
|
||||
interrupt-controller;
|
||||
|
||||
ti,system-power-controller;
|
||||
ti,palmas-override-powerhold;
|
||||
|
||||
tps659038_pmic {
|
||||
compatible = "ti,tps659038-pmic";
|
||||
|
||||
@@ -43,6 +43,58 @@
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
leds-iio {
|
||||
status = "disabled";
|
||||
compatible = "gpio-leds";
|
||||
led-out0 {
|
||||
label = "out0";
|
||||
gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out1 {
|
||||
label = "out1";
|
||||
gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out2 {
|
||||
label = "out2";
|
||||
gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out3 {
|
||||
label = "out3";
|
||||
gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out4 {
|
||||
label = "out4";
|
||||
gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out5 {
|
||||
label = "out5";
|
||||
gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out6 {
|
||||
label = "out6";
|
||||
gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-out7 {
|
||||
label = "out7";
|
||||
gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
@@ -57,6 +109,7 @@
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
ti,system-power-controller;
|
||||
ti,palmas-override-powerhold;
|
||||
|
||||
tps659038_pmic {
|
||||
compatible = "ti,tps659038-pmic";
|
||||
@@ -253,6 +306,28 @@
|
||||
};
|
||||
};
|
||||
|
||||
&mcspi3 {
|
||||
status = "okay";
|
||||
ti,pindir-d0-out-d1-in;
|
||||
|
||||
sn65hvs882: sn65hvs882@0 {
|
||||
compatible = "pisosr-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
};
|
||||
|
||||
tpic2810: tpic2810@60 {
|
||||
compatible = "ti,tpic2810";
|
||||
reg = <0x60>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
|
||||
|
||||
@@ -67,7 +67,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
@@ -86,18 +86,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@@ -182,24 +170,6 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* both standard PCIe slots and mini-PCIe
|
||||
* slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
@@ -261,6 +231,37 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* both standard PCIe slots and mini-PCIe
|
||||
* slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0_pins2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
@@ -62,7 +62,7 @@
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MiB */
|
||||
};
|
||||
@@ -72,20 +72,6 @@
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
sata@a0000 {
|
||||
nr-ports = <2>;
|
||||
@@ -262,6 +248,20 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
sata_l_white_pin: sata-l-white-pin {
|
||||
marvell,pins = "mpp57";
|
||||
|
||||
@@ -54,7 +54,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@@ -64,22 +64,6 @@
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected on the PCB to a USB 3.0 XHCI controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
@@ -113,17 +97,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@@ -197,6 +170,34 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected on the PCB to a USB 3.0 XHCI controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pwr_led_pin: pwr-led-pin {
|
||||
marvell,pins = "mpp63";
|
||||
|
||||
@@ -56,7 +56,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@@ -66,22 +66,6 @@
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to Marvell 88SE9170 SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
|
||||
@@ -99,14 +83,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@@ -120,8 +96,11 @@
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
|
||||
isl12057: isl12057@68 {
|
||||
@@ -257,6 +236,30 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to Marvell 88SE9170 SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
power_led_pin: power-led-pin {
|
||||
marvell,pins = "mpp57";
|
||||
|
||||
@@ -56,7 +56,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@@ -66,22 +66,6 @@
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to Marvell 88SE9215 SATA controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
|
||||
@@ -93,18 +77,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@@ -126,8 +98,11 @@
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
|
||||
isl12057: isl12057@68 {
|
||||
@@ -279,6 +254,34 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to Marvell 88SE9215 SATA controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
poweroff: poweroff {
|
||||
marvell,pins = "mpp60";
|
||||
|
||||
@@ -67,7 +67,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@@ -77,22 +77,6 @@
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
@@ -102,14 +86,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
@@ -146,7 +122,7 @@
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
button@1 {
|
||||
button {
|
||||
label = "Software Button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
||||
@@ -196,7 +172,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
dsa@0 {
|
||||
dsa {
|
||||
compatible = "marvell,dsa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
@@ -235,7 +211,32 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&pinctrl {
|
||||
fan_pins: fan-pins {
|
||||
|
||||
@@ -28,20 +28,7 @@
|
||||
compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
|
||||
|
||||
soc {
|
||||
pcie-controller {
|
||||
/* SATA AHCI controller 88SE9170 */
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
mdio {
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
@@ -131,3 +118,17 @@
|
||||
1300 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
/* SATA AHCI controller 88SE9170 */
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -23,7 +23,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@@ -32,15 +32,6 @@
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* USB 3.0 bridge ASM1042A */
|
||||
pcie@2,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
@@ -51,15 +42,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
@@ -159,19 +141,19 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
button@1 {
|
||||
power {
|
||||
label = "Power button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <100>;
|
||||
};
|
||||
button@2 {
|
||||
backup {
|
||||
label = "Backup button";
|
||||
linux,code = <KEY_OPTION>;
|
||||
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <100>;
|
||||
};
|
||||
button@3 {
|
||||
reset {
|
||||
label = "Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
@@ -208,6 +190,25 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* USB 3.0 bridge ASM1042A */
|
||||
pcie@2,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
@@ -24,7 +24,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@@ -33,15 +33,6 @@
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* USB 3.0 Bridge ASM1042A */
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
coherency-fabric@20200 {
|
||||
broken-idle;
|
||||
@@ -51,15 +42,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
@@ -107,19 +89,19 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
button@1 {
|
||||
power {
|
||||
label = "Power button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
|
||||
debounce-interval = <100>;
|
||||
};
|
||||
button@2 {
|
||||
reset {
|
||||
label = "Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <100>;
|
||||
};
|
||||
button@3 {
|
||||
button {
|
||||
label = "USB VBUS error";
|
||||
linux,code = <KEY_UNKNOWN>;
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
|
||||
@@ -143,6 +125,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* USB 3.0 Bridge ASM1042A */
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-0 = <&sata_led_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
@@ -70,7 +70,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
@@ -127,12 +127,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy1>;
|
||||
@@ -192,7 +186,7 @@
|
||||
pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
sata1_regulator: sata1-regulator {
|
||||
sata1_regulator: sata1-regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "SATA1 Power";
|
||||
@@ -205,7 +199,7 @@
|
||||
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata2_regulator: sata2-regulator {
|
||||
sata2_regulator: sata2-regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
regulator-name = "SATA2 Power";
|
||||
@@ -220,6 +214,12 @@
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
disk1_led_pin: disk1-led-pin {
|
||||
marvell,pins = "mpp31";
|
||||
|
||||
@@ -50,8 +50,6 @@
|
||||
* 370 and Armada XP SoC.
|
||||
*/
|
||||
|
||||
/include/ "skeleton64.dtsi"
|
||||
|
||||
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
|
||||
|
||||
/ {
|
||||
@@ -86,7 +84,7 @@
|
||||
pcie-mem-aperture = <0xf8000000 0x7e00000>;
|
||||
pcie-io-aperture = <0xffe00000 0x100000>;
|
||||
|
||||
devbus-bootcs {
|
||||
devbus_bootcs: devbus-bootcs {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
|
||||
@@ -96,7 +94,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs0 {
|
||||
devbus_cs0: devbus-cs0 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
|
||||
@@ -106,7 +104,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs1 {
|
||||
devbus_cs1: devbus-cs1 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
|
||||
@@ -116,7 +114,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs2 {
|
||||
devbus_cs2: devbus-cs2 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
|
||||
@@ -126,7 +124,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs3 {
|
||||
devbus_cs3: devbus-cs3 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
|
||||
@@ -142,7 +140,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
|
||||
|
||||
rtc@10300 {
|
||||
rtc: rtc@10300 {
|
||||
compatible = "marvell,orion-rtc";
|
||||
reg = <0x10300 0x20>;
|
||||
interrupts = <50>;
|
||||
@@ -214,33 +212,38 @@
|
||||
msi-controller;
|
||||
};
|
||||
|
||||
coherency-fabric@20200 {
|
||||
coherencyfab: coherency-fabric@20200 {
|
||||
compatible = "marvell,coherency-fabric";
|
||||
reg = <0x20200 0xb0>, <0x21010 0x1c>;
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
timer: timer@20300 {
|
||||
reg = <0x20300 0x30>, <0x21040 0x30>;
|
||||
interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
|
||||
};
|
||||
|
||||
watchdog@20300 {
|
||||
watchdog: watchdog@20300 {
|
||||
reg = <0x20300 0x34>, <0x20704 0x4>;
|
||||
};
|
||||
|
||||
pmsu@22000 {
|
||||
cpurst: cpurst@20800 {
|
||||
compatible = "marvell,armada-370-cpu-reset";
|
||||
reg = <0x20800 0x8>;
|
||||
};
|
||||
|
||||
pmsu: pmsu@22000 {
|
||||
compatible = "marvell,armada-370-pmsu";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
usb0: usb@50000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x50000 0x500>;
|
||||
interrupts = <45>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@51000 {
|
||||
usb1: usb@51000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x51000 0x500>;
|
||||
interrupts = <46>;
|
||||
@@ -254,7 +257,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio: mdio {
|
||||
mdio: mdio@72004 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "marvell,orion-mdio";
|
||||
@@ -269,7 +272,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata@a0000 {
|
||||
sata: sata@a0000 {
|
||||
compatible = "marvell,armada-370-sata";
|
||||
reg = <0xa0000 0x5000>;
|
||||
interrupts = <55>;
|
||||
@@ -278,7 +281,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand@d0000 {
|
||||
nand: nand@d0000 {
|
||||
compatible = "marvell,armada370-nand";
|
||||
reg = <0xd0000 0x54>;
|
||||
#address-cells = <1>;
|
||||
@@ -288,7 +291,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mvsdio@d4000 {
|
||||
sdio: mvsdio@d4000 {
|
||||
compatible = "marvell,orion-sdio";
|
||||
reg = <0xd4000 0x200>;
|
||||
interrupts = <54>;
|
||||
|
||||
@@ -50,9 +50,11 @@
|
||||
*/
|
||||
|
||||
#include "armada-370-xp.dtsi"
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
model = "Marvell Armada 370 family SoC";
|
||||
compatible = "marvell,armada370", "marvell,armada-370-xp";
|
||||
|
||||
@@ -70,7 +72,7 @@
|
||||
reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>;
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
pciec: pcie-controller@82000000 {
|
||||
compatible = "marvell,armada-370-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
@@ -89,7 +91,7 @@
|
||||
0x82000000 0x2 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
|
||||
0x81000000 0x2 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
pcie0: pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
@@ -106,7 +108,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
pcie2: pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
@@ -125,7 +127,7 @@
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
L2: l2-cache {
|
||||
L2: l2-cache@8000 {
|
||||
compatible = "marvell,aurora-outer-cache";
|
||||
reg = <0x08000 0x1000>;
|
||||
cache-id-part = <0x100>;
|
||||
@@ -134,14 +136,6 @@
|
||||
wt-override;
|
||||
};
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
reg = <0x11000 0x20>;
|
||||
};
|
||||
|
||||
i2c1: i2c@11100 {
|
||||
reg = <0x11100 0x20>;
|
||||
};
|
||||
|
||||
gpio0: gpio@18100 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>;
|
||||
@@ -175,22 +169,8 @@
|
||||
interrupts = <91>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Default UART pinctrl setting without RTS/CTS, can
|
||||
* be overwritten on board level if a different
|
||||
* configuration is used.
|
||||
*/
|
||||
uart0: serial@12000 {
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
uart1: serial@12100 {
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
system-controller@18200 {
|
||||
systemc: system-controller@18200 {
|
||||
compatible = "marvell,armada-370-xp-system-controller";
|
||||
reg = <0x18200 0x100>;
|
||||
};
|
||||
@@ -208,37 +188,18 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
thermal@18300 {
|
||||
thermal: thermal@18300 {
|
||||
compatible = "marvell,armada370-thermal";
|
||||
reg = <0x18300 0x4
|
||||
0x18304 0x4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sscg@18330 {
|
||||
sscg: sscg@18330 {
|
||||
reg = <0x18330 0x4>;
|
||||
};
|
||||
|
||||
interrupt-controller@20a00 {
|
||||
reg = <0x20a00 0x1d0>, <0x21870 0x58>;
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "marvell,armada-370-timer";
|
||||
clocks = <&coreclk 2>;
|
||||
};
|
||||
|
||||
watchdog@20300 {
|
||||
compatible = "marvell,armada-370-wdt";
|
||||
clocks = <&coreclk 2>;
|
||||
};
|
||||
|
||||
cpurst@20800 {
|
||||
compatible = "marvell,armada-370-cpu-reset";
|
||||
reg = <0x20800 0x8>;
|
||||
};
|
||||
|
||||
cpu-config@21000 {
|
||||
cpuconf: cpu-config@21000 {
|
||||
compatible = "marvell,armada-370-cpu-config";
|
||||
reg = <0x21000 0x8>;
|
||||
};
|
||||
@@ -253,15 +214,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
usb@51000 {
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
xor@60800 {
|
||||
xor0: xor@60800 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60800 0x100
|
||||
0x60A00 0x100>;
|
||||
@@ -280,7 +233,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
xor@60900 {
|
||||
xor1: xor@60900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60900 0x100
|
||||
0x60b00 0x100>;
|
||||
@@ -299,15 +252,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
};
|
||||
|
||||
crypto@90000 {
|
||||
cesa: crypto@90000 {
|
||||
compatible = "marvell,armada-370-crypto";
|
||||
reg = <0x90000 0x10000>;
|
||||
reg-names = "regs";
|
||||
@@ -342,6 +287,59 @@
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Default UART pinctrl setting without RTS/CTS, can be overwritten on
|
||||
* board level if a different configuration is used.
|
||||
*/
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
reg = <0x11000 0x20>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
reg = <0x11100 0x20>;
|
||||
};
|
||||
|
||||
&mpic {
|
||||
reg = <0x20a00 0x1d0>, <0x21870 0x58>;
|
||||
};
|
||||
|
||||
&timer {
|
||||
compatible = "marvell,armada-370-timer";
|
||||
clocks = <&coreclk 2>;
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
compatible = "marvell,armada-370-wdt";
|
||||
clocks = <&coreclk 2>;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
ð0 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
};
|
||||
|
||||
ð1 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
compatible = "marvell,mv88f6710-pinctrl";
|
||||
|
||||
|
||||
@@ -58,7 +58,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
@@ -69,138 +69,141 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0xf1110000 0x10000>;
|
||||
|
||||
internal-regs {
|
||||
spi@10600 {
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
pinctrl-names = "default";
|
||||
/*
|
||||
* SPI conflicts with NAND, so we disable it
|
||||
* here, and select NAND as the enabled device
|
||||
* by default.
|
||||
*/
|
||||
status = "disabled";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
i2c@11100 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
sdio_st_pins: sdio-st-pins {
|
||||
marvell,pins = "mpp44", "mpp45";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
sata@a0000 {
|
||||
status = "okay";
|
||||
nr-ports = <2>;
|
||||
};
|
||||
|
||||
nand: nand@d0000 {
|
||||
pinctrl-0 = <&nand_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
num-cs = <1>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0 0x800000>;
|
||||
};
|
||||
partition@800000 {
|
||||
label = "Linux";
|
||||
reg = <0x800000 0x800000>;
|
||||
};
|
||||
partition@1000000 {
|
||||
label = "Filesystem";
|
||||
reg = <0x1000000 0x3f000000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@54000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb3@58000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mvsdio@d4000 {
|
||||
pinctrl-0 = <&sdio_pins &sdio_st_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@f0000 {
|
||||
status = "okay";
|
||||
|
||||
eth0@c4000 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
eth1@c5000 {
|
||||
status = "okay";
|
||||
phy = <&phy3>;
|
||||
phy-mode = "gmii";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
&pciec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
* The two PCIe units are accessible through
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
&pcie0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/*
|
||||
* SPI conflicts with NAND, so we disable it here, and
|
||||
* select NAND as the enabled device by default.
|
||||
*/
|
||||
|
||||
status = "disabled";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
sdio_st_pins: sdio-st-pins {
|
||||
marvell,pins = "mpp44", "mpp45";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
nr-ports = <2>;
|
||||
};
|
||||
|
||||
&nand {
|
||||
pinctrl-0 = <&nand_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
num-cs = <1>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0 0x800000>;
|
||||
};
|
||||
partition@800000 {
|
||||
label = "Linux";
|
||||
reg = <0x800000 0x800000>;
|
||||
};
|
||||
partition@1000000 {
|
||||
label = "Filesystem";
|
||||
reg = <0x1000000 0x3f000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdio {
|
||||
pinctrl-0 = <&sdio_pins &sdio_st_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
ðernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
ð1 {
|
||||
status = "okay";
|
||||
phy = <&phy3>;
|
||||
phy-mode = "gmii";
|
||||
};
|
||||
|
||||
@@ -45,7 +45,6 @@
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
@@ -53,6 +52,9 @@
|
||||
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
model = "Marvell Armada 375 family SoC";
|
||||
compatible = "marvell,armada375";
|
||||
|
||||
@@ -65,7 +67,7 @@
|
||||
};
|
||||
|
||||
clocks {
|
||||
/* 2 GHz fixed main PLL */
|
||||
/* 1 GHz fixed main PLL */
|
||||
mainpll: mainpll {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
@@ -84,12 +86,12 @@
|
||||
#size-cells = <0>;
|
||||
enable-method = "marvell,armada-375-smp";
|
||||
|
||||
cpu@0 {
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0>;
|
||||
};
|
||||
cpu@1 {
|
||||
cpu1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <1>;
|
||||
@@ -115,7 +117,7 @@
|
||||
reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
|
||||
};
|
||||
|
||||
devbus-bootcs {
|
||||
devbus_bootcs: devbus-bootcs {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
|
||||
@@ -125,7 +127,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs0 {
|
||||
devbus_cs0: devbus-cs0 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
|
||||
@@ -135,7 +137,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs1 {
|
||||
devbus_cs1: devbus-cs1 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
|
||||
@@ -145,7 +147,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs2 {
|
||||
devbus_cs2: devbus-cs2 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
|
||||
@@ -155,7 +157,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
devbus-cs3 {
|
||||
devbus_cs3: devbus-cs3 {
|
||||
compatible = "marvell,mvebu-devbus";
|
||||
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
|
||||
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
|
||||
@@ -182,12 +184,12 @@
|
||||
prefetch-data = <1>;
|
||||
};
|
||||
|
||||
scu@c000 {
|
||||
scu: scu@c000 {
|
||||
compatible = "arm,cortex-a9-scu";
|
||||
reg = <0xc000 0x58>;
|
||||
};
|
||||
|
||||
timer@c600 {
|
||||
timer0: timer@c600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0xc600 0x20>;
|
||||
interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
|
||||
@@ -203,7 +205,7 @@
|
||||
<0xc100 0x100>;
|
||||
};
|
||||
|
||||
mdio {
|
||||
mdio: mdio@c0054 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "marvell,orion-mdio";
|
||||
@@ -212,7 +214,7 @@
|
||||
};
|
||||
|
||||
/* Network controller */
|
||||
ethernet@f0000 {
|
||||
ethernet: ethernet@f0000 {
|
||||
compatible = "marvell,armada-375-pp2";
|
||||
reg = <0xf0000 0xa000>, /* Packet Processor regs */
|
||||
<0xc0000 0x3060>, /* LMS regs */
|
||||
@@ -222,20 +224,20 @@
|
||||
clock-names = "pp_clk", "gop_clk";
|
||||
status = "disabled";
|
||||
|
||||
eth0: eth0@c4000 {
|
||||
eth0: eth0 {
|
||||
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
port-id = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
eth1: eth1@c5000 {
|
||||
eth1: eth1 {
|
||||
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
port-id = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@10300 {
|
||||
rtc: rtc@10300 {
|
||||
compatible = "marvell,orion-rtc";
|
||||
reg = <0x10300 0x20>;
|
||||
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -307,7 +309,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
pinctrl: pinctrl@18000 {
|
||||
compatible = "marvell,mv88f6720-pinctrl";
|
||||
reg = <0x18000 0x24>;
|
||||
|
||||
@@ -382,7 +384,7 @@
|
||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
system-controller@18200 {
|
||||
systemc: system-controller@18200 {
|
||||
compatible = "marvell,armada-375-system-controller";
|
||||
reg = <0x18200 0x100>;
|
||||
};
|
||||
@@ -415,7 +417,7 @@
|
||||
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
timer1: timer@20300 {
|
||||
compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
|
||||
reg = <0x20300 0x30>, <0x21040 0x30>;
|
||||
interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
@@ -428,24 +430,24 @@
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
watchdog@20300 {
|
||||
watchdog: watchdog@20300 {
|
||||
compatible = "marvell,armada-375-wdt";
|
||||
reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
|
||||
clocks = <&coreclk 0>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
cpurst@20800 {
|
||||
cpurst: cpurst@20800 {
|
||||
compatible = "marvell,armada-370-cpu-reset";
|
||||
reg = <0x20800 0x10>;
|
||||
};
|
||||
|
||||
coherency-fabric@21010 {
|
||||
coherencyfab: coherency-fabric@21010 {
|
||||
compatible = "marvell,armada-375-coherency-fabric";
|
||||
reg = <0x21010 0x1c>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
usb0: usb@50000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x50000 0x500>;
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -455,7 +457,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@54000 {
|
||||
usb1: usb@54000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x54000 0x500>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -463,7 +465,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb3@58000 {
|
||||
usb2: usb3@58000 {
|
||||
compatible = "marvell,armada-375-xhci";
|
||||
reg = <0x58000 0x20000>,<0x5b880 0x80>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -473,7 +475,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xor@60800 {
|
||||
xor0: xor@60800 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60800 0x100
|
||||
0x60A00 0x100>;
|
||||
@@ -493,7 +495,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
xor@60900 {
|
||||
xor1: xor@60900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60900 0x100
|
||||
0x60b00 0x100>;
|
||||
@@ -513,7 +515,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
crypto@90000 {
|
||||
cesa: crypto@90000 {
|
||||
compatible = "marvell,armada-375-crypto";
|
||||
reg = <0x90000 0x10000>;
|
||||
reg-names = "regs";
|
||||
@@ -528,7 +530,7 @@
|
||||
marvell,crypto-sram-size = <0x800>;
|
||||
};
|
||||
|
||||
sata@a0000 {
|
||||
sata: sata@a0000 {
|
||||
compatible = "marvell,armada-370-sata";
|
||||
reg = <0xa0000 0x5000>;
|
||||
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -537,7 +539,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand@d0000 {
|
||||
nand: nand@d0000 {
|
||||
compatible = "marvell,armada370-nand";
|
||||
reg = <0xd0000 0x54>;
|
||||
#address-cells = <1>;
|
||||
@@ -547,7 +549,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mvsdio@d4000 {
|
||||
sdio: mvsdio@d4000 {
|
||||
compatible = "marvell,orion-sdio";
|
||||
reg = <0xd4000 0x200>;
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -559,7 +561,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
thermal@e8078 {
|
||||
thermal: thermal@e8078 {
|
||||
compatible = "marvell,armada375-thermal";
|
||||
reg = <0xe8078 0x4>, <0xe807c 0x8>;
|
||||
status = "okay";
|
||||
@@ -580,7 +582,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
pciec: pcie-controller@82000000 {
|
||||
compatible = "marvell,armada-370-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
@@ -599,7 +601,7 @@
|
||||
0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1 MEM */
|
||||
0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
pcie0: pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
@@ -616,7 +618,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
pcie1: pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
|
||||
340
arch/arm/boot/dts/armada-385-turris-omnia.dts
Звичайний файл
340
arch/arm/boot/dts/armada-385-turris-omnia.dts
Звичайний файл
@@ -0,0 +1,340 @@
|
||||
/*
|
||||
* Device Tree file for the Turris Omnia
|
||||
*
|
||||
* Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org>
|
||||
* Copyright (C) 2016 Tomas Hlavacek <tmshlvkc@gmail.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "armada-385.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Turris Omnia";
|
||||
compatible = "cznic,turris-omnia", "marvell,armada385", "marvell,armada380";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x40000000>; /* 1024 MB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* USB part of the PCIe2/USB 2.0 port */
|
||||
usb@58000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@a8000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sdhci@d8000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdhci_pins>;
|
||||
status = "okay";
|
||||
|
||||
bus-width = <8>;
|
||||
no-1-8-v;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
usb3@f0000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb3@f8000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@3,0 {
|
||||
/* Port 2, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Connected to 88E6176 switch, port 6 */
|
||||
ð0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* Connected to 88E6176 switch, port 5 */
|
||||
ð1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* WAN port */
|
||||
ð2 {
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
phy = <&phy1>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
|
||||
i2cmux@70 {
|
||||
compatible = "nxp,pca9547";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x70>;
|
||||
status = "okay";
|
||||
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
/* STM32F0 command interface at address 0x2a */
|
||||
/* leds device (in STM32F0) at address 0x2b */
|
||||
|
||||
eeprom@54 {
|
||||
compatible = "at,24c64";
|
||||
reg = <0x54>;
|
||||
|
||||
/* The EEPROM contains data for bootloader.
|
||||
* Contents:
|
||||
* struct omnia_eeprom {
|
||||
* u32 magic; (=0x0341a034 in LE)
|
||||
* u32 ramsize; (in GiB)
|
||||
* char regdomain[4];
|
||||
* u32 crc32;
|
||||
* };
|
||||
*/
|
||||
};
|
||||
};
|
||||
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
/* routed to PCIe0/mSATA connector (CN7A) */
|
||||
};
|
||||
|
||||
i2c@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
|
||||
/* routed to PCIe1/USB2 connector (CN61A) */
|
||||
};
|
||||
|
||||
i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
|
||||
/* routed to PCIe2 connector (CN62A) */
|
||||
};
|
||||
|
||||
i2c@4 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <4>;
|
||||
|
||||
/* routed to SFP+ */
|
||||
};
|
||||
|
||||
i2c@5 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <5>;
|
||||
|
||||
/* ATSHA204A at address 0x64 */
|
||||
};
|
||||
|
||||
i2c@6 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <6>;
|
||||
|
||||
/* exposed on pin header */
|
||||
};
|
||||
|
||||
i2c@7 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <7>;
|
||||
|
||||
pcawan: gpio@71 {
|
||||
/*
|
||||
* GPIO expander for SFP+ signals and
|
||||
* and phy irq
|
||||
*/
|
||||
compatible = "nxp,pca9538";
|
||||
reg = <0x71>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcawan_pins>;
|
||||
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
status = "okay";
|
||||
|
||||
phy1: phy@1 {
|
||||
status = "okay";
|
||||
compatible = "ethernet-phy-id0141.0DD1", "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
|
||||
/* irq is connected to &pcawan pin 7 */
|
||||
};
|
||||
|
||||
/* Switch MV88E7176 at address 0x10 */
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pcawan_pins: pcawan-pins {
|
||||
marvell,pins = "mpp46";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
spi0cs0_pins: spi0cs0-pins {
|
||||
marvell,pins = "mpp25";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
|
||||
spi0cs1_pins: spi0cs1-pins {
|
||||
marvell,pins = "mpp26";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins &spi0cs0_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi-nor@0 {
|
||||
compatible = "spansion,s25fl164k", "jedec,spi-nor";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x00100000>;
|
||||
label = "U-Boot";
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
reg = <0x00100000 0x00700000>;
|
||||
label = "Rescue system";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
/* Pin header CN10 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
/* Pin header CN11 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
@@ -661,7 +661,7 @@
|
||||
};
|
||||
|
||||
clocks {
|
||||
/* 2 GHz fixed main PLL */
|
||||
/* 1 GHz fixed main PLL */
|
||||
mainpll: mainpll {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
|
||||
@@ -573,7 +573,7 @@
|
||||
};
|
||||
|
||||
clocks {
|
||||
/* 2 GHz fixed main PLL */
|
||||
/* 1 GHz fixed main PLL */
|
||||
mainpll: mainpll {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
|
||||
@@ -62,7 +62,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */
|
||||
};
|
||||
@@ -73,28 +73,6 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* First mini-PCIe port */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Second mini-PCIe port */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Renesas uPD720202 USB 3.0 controller */
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
/* UART0 */
|
||||
serial@12000 {
|
||||
@@ -111,16 +89,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@@ -145,7 +113,7 @@
|
||||
pinctrl-0 = <&keys_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
button@1 {
|
||||
reset {
|
||||
label = "Factory Reset Button";
|
||||
linux,code = <KEY_SETUP>;
|
||||
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
@@ -153,6 +121,38 @@
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* First mini-PCIe port */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Second mini-PCIe port */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Renesas uPD720202 USB 3.0 controller */
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-0 = <&phy_int_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
@@ -67,7 +67,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x80000000>; /* 2 GB */
|
||||
};
|
||||
@@ -108,39 +108,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* All 6 slots are physically present as
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 2 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@4,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@9,0 {
|
||||
/* Port 2, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@10,0 {
|
||||
/* Port 3, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
@@ -160,24 +127,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <25>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <27>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
@@ -266,6 +215,57 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* All 6 slots are physically present as
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 2 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@4,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@9,0 {
|
||||
/* Port 2, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@10,0 {
|
||||
/* Port 3, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <25>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <27>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
|
||||
@@ -68,7 +68,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
/*
|
||||
* 8 GB of plug-in RAM modules by default.The amount
|
||||
@@ -127,27 +127,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* The 3 slots are physically present as
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@9,0 {
|
||||
/* Port 2, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@10,0 {
|
||||
/* Port 3, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
@@ -175,24 +154,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <16>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <17>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <18>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
@@ -251,6 +212,45 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* The 3 slots are physically present as
|
||||
* standard PCIe slots on the board.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@9,0 {
|
||||
/* Port 2, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
pcie@10,0 {
|
||||
/* Port 3, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <16>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <17>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <18>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
|
||||
@@ -57,7 +57,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x20000000>; /* 512MB */
|
||||
};
|
||||
@@ -68,37 +68,11 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Quad port sata: Marvell 88SX7042 */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB 3.0 xHCI controller: NEC D720200F1 */
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
@@ -295,6 +269,31 @@
|
||||
gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Quad port sata: Marvell 88SX7042 */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB 3.0 xHCI controller: NEC D720200F1 */
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
poweroff_pin: poweroff-pin {
|
||||
|
||||
@@ -62,7 +62,7 @@
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
|
||||
};
|
||||
@@ -73,28 +73,6 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Etron EJ168 USB 3.0 controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* First mini-PCIe port */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Second mini-PCIe port */
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
rtc@10300 {
|
||||
@@ -289,13 +267,13 @@
|
||||
pinctrl-0 = <&keys_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
button@1 {
|
||||
wps {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
reset {
|
||||
label = "Factory Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
@@ -323,7 +301,7 @@
|
||||
4500 1>;
|
||||
};
|
||||
|
||||
dsa@0 {
|
||||
dsa {
|
||||
compatible = "marvell,dsa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
@@ -369,6 +347,28 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Etron EJ168 USB 3.0 controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* First mini-PCIe port */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Second mini-PCIe port */
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
|
||||
keys_pin: keys-pin {
|
||||
|
||||
@@ -55,7 +55,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
/*
|
||||
* This board has 4 GB of RAM, but the last 256 MB of
|
||||
@@ -99,18 +99,18 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -86,7 +86,7 @@
|
||||
* configured as x4 or quad x1 lanes. One unit is
|
||||
* x1 only.
|
||||
*/
|
||||
pcie-controller {
|
||||
pciec: pcie-controller@82000000 {
|
||||
compatible = "marvell,armada-xp-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
@@ -114,7 +114,7 @@
|
||||
0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
|
||||
0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
pcie1: pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
@@ -131,7 +131,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
pcie2: pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
@@ -148,7 +148,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@3,0 {
|
||||
pcie3: pcie@3,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
@@ -165,7 +165,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@4,0 {
|
||||
pcie4: pcie@4,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
@@ -182,7 +182,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@5,0 {
|
||||
pcie5: pcie@5,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
|
||||
@@ -87,7 +87,7 @@
|
||||
* configured as x4 or quad x1 lanes. One unit is
|
||||
* x4 only.
|
||||
*/
|
||||
pcie-controller {
|
||||
pciec: pcie-controller@82000000 {
|
||||
compatible = "marvell,armada-xp-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
@@ -129,7 +129,7 @@
|
||||
0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
|
||||
0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
pcie1: pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
@@ -146,7 +146,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
pcie2: pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
@@ -163,7 +163,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@3,0 {
|
||||
pcie3: pcie@3,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
@@ -180,7 +180,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@4,0 {
|
||||
pcie4: pcie@4,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
@@ -197,7 +197,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@5,0 {
|
||||
pcie5: pcie@5,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
@@ -214,7 +214,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@6,0 {
|
||||
pcie6: pcie@6,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
|
||||
reg = <0x3000 0 0 0 0>;
|
||||
@@ -231,7 +231,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@7,0 {
|
||||
pcie7: pcie@7,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
|
||||
reg = <0x3800 0 0 0 0>;
|
||||
@@ -248,7 +248,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@8,0 {
|
||||
pcie8: pcie@8,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
|
||||
reg = <0x4000 0 0 0 0>;
|
||||
@@ -265,7 +265,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@9,0 {
|
||||
pcie9: pcie@9,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
|
||||
reg = <0x4800 0 0 0 0>;
|
||||
|
||||
@@ -104,7 +104,7 @@
|
||||
* configured as x4 or quad x1 lanes. Two units are
|
||||
* x4/x1.
|
||||
*/
|
||||
pcie-controller {
|
||||
pciec: pcie-controller@82000000 {
|
||||
compatible = "marvell,armada-xp-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
@@ -150,7 +150,7 @@
|
||||
0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
|
||||
0x81000000 0xa 0 MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO */>;
|
||||
|
||||
pcie@1,0 {
|
||||
pcie1: pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
@@ -167,7 +167,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
pcie2: pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
@@ -184,7 +184,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@3,0 {
|
||||
pcie3: pcie@3,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
@@ -201,7 +201,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@4,0 {
|
||||
pcie4: pcie@4,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
@@ -218,7 +218,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@5,0 {
|
||||
pcie5: pcie@5,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
|
||||
reg = <0x2800 0 0 0 0>;
|
||||
@@ -235,7 +235,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@6,0 {
|
||||
pcie6: pcie@6,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
|
||||
reg = <0x3000 0 0 0 0>;
|
||||
@@ -252,7 +252,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@7,0 {
|
||||
pcie7: pcie@7,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
|
||||
reg = <0x3800 0 0 0 0>;
|
||||
@@ -269,7 +269,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@8,0 {
|
||||
pcie8: pcie@8,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
|
||||
reg = <0x4000 0 0 0 0>;
|
||||
@@ -286,7 +286,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@9,0 {
|
||||
pcie9: pcie@9,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
|
||||
reg = <0x4800 0 0 0 0>;
|
||||
@@ -303,7 +303,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@10,0 {
|
||||
pcie10: pcie@10,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
|
||||
reg = <0x5000 0 0 0 0>;
|
||||
|
||||
@@ -56,7 +56,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x80000000>; /* 2GB */
|
||||
};
|
||||
@@ -67,28 +67,6 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to first Marvell 88SE9170 SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to second Marvell 88SE9170 SATA controller */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to Fresco Logic FL1009 USB 3.0 controller */
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
|
||||
@@ -97,7 +75,6 @@
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
|
||||
@@ -154,23 +131,19 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
phy = <&phy1>;
|
||||
phy-mode = "rgmii-id";
|
||||
@@ -295,6 +268,39 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to first Marvell 88SE9170 SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to second Marvell 88SE9170 SATA controller */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to Fresco Logic FL1009 USB 3.0 controller */
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&pinctrl {
|
||||
poweroff: poweroff {
|
||||
marvell,pins = "mpp42";
|
||||
|
||||
@@ -57,7 +57,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */
|
||||
};
|
||||
@@ -98,15 +98,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
rtc@10300 {
|
||||
/* No crystal connected to the internal RTC */
|
||||
@@ -148,31 +139,13 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
button@1 {
|
||||
init {
|
||||
label = "Init Button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
@@ -240,6 +213,33 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
/* Internal mini-PCIe connector */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
led_pins: led-pins-0 {
|
||||
marvell,pins = "mpp49", "mpp51", "mpp53";
|
||||
|
||||
@@ -70,7 +70,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x40000000>; /* 1GB */
|
||||
};
|
||||
@@ -81,28 +81,6 @@
|
||||
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* Connected to Marvell 88SX7042 SATA-II controller
|
||||
* handling the four disks.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
* Connected to EtronTech EJ168A XHCI controller
|
||||
* providing the two rear USB 3.0 ports.
|
||||
*/
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* RTC is provided by Seiko S-35390A below */
|
||||
@@ -150,16 +128,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1512 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
@@ -186,7 +154,7 @@
|
||||
&sata3_pwr_pin &sata4_pwr_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
sata1_regulator: sata1-regulator {
|
||||
sata1_regulator: sata1-regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "SATA1 Power";
|
||||
@@ -199,7 +167,7 @@
|
||||
gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata2_regulator: sata2-regulator {
|
||||
sata2_regulator: sata2-regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
regulator-name = "SATA2 Power";
|
||||
@@ -212,7 +180,7 @@
|
||||
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata3_regulator: sata3-regulator {
|
||||
sata3_regulator: sata3-regulator@3 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <3>;
|
||||
regulator-name = "SATA3 Power";
|
||||
@@ -225,7 +193,7 @@
|
||||
gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata4_regulator: sata4-regulator {
|
||||
sata4_regulator: sata4-regulator@4 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <4>;
|
||||
regulator-name = "SATA4 Power";
|
||||
@@ -240,6 +208,39 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* Connected to Marvell 88SX7042 SATA-II controller
|
||||
* handling the four disks.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
* Connected to EtronTech EJ168A XHCI controller
|
||||
* providing the two rear USB 3.0 ports.
|
||||
*/
|
||||
pcie@5,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1512 */
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
sata1_pwr_pin: sata1-pwr-pin {
|
||||
marvell,pins = "mpp42";
|
||||
|
||||
@@ -53,6 +53,9 @@
|
||||
#include "armada-370-xp.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
model = "Marvell Armada XP family SoC";
|
||||
compatible = "marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
@@ -75,7 +78,7 @@
|
||||
reg = <0x1400 0x500>;
|
||||
};
|
||||
|
||||
L2: l2-cache {
|
||||
L2: l2-cache@8000 {
|
||||
compatible = "marvell,aurora-system-cache";
|
||||
reg = <0x08000 0x1000>;
|
||||
cache-id-part = <0x100>;
|
||||
@@ -84,16 +87,6 @@
|
||||
wt-override;
|
||||
};
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11000 0x100>;
|
||||
};
|
||||
|
||||
i2c1: i2c@11100 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11100 0x100>;
|
||||
};
|
||||
|
||||
uart2: serial@12200 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
@@ -118,7 +111,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
system-controller@18200 {
|
||||
systemc: system-controller@18200 {
|
||||
compatible = "marvell,armada-370-xp-system-controller";
|
||||
reg = <0x18200 0x500>;
|
||||
};
|
||||
@@ -136,7 +129,7 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
thermal@182b0 {
|
||||
thermal: thermal@182b0 {
|
||||
compatible = "marvell,armadaxp-thermal";
|
||||
reg = <0x182b0 0x4
|
||||
0x184d0 0x4>;
|
||||
@@ -150,27 +143,6 @@
|
||||
clocks = <&coreclk 1>;
|
||||
};
|
||||
|
||||
interrupt-controller@20a00 {
|
||||
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "marvell,armada-xp-timer";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
watchdog@20300 {
|
||||
compatible = "marvell,armada-xp-wdt";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
cpurst@20800 {
|
||||
compatible = "marvell,armada-370-cpu-reset";
|
||||
reg = <0x20800 0x20>;
|
||||
};
|
||||
|
||||
cpu-config@21000 {
|
||||
compatible = "marvell,armada-xp-cpu-config";
|
||||
reg = <0x21000 0x8>;
|
||||
@@ -184,15 +156,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
clocks = <&gateclk 18>;
|
||||
};
|
||||
|
||||
usb@51000 {
|
||||
clocks = <&gateclk 19>;
|
||||
};
|
||||
|
||||
usb@52000 {
|
||||
usb2: usb@52000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x52000 0x500>;
|
||||
interrupts = <47>;
|
||||
@@ -200,7 +164,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xor@60900 {
|
||||
xor1: xor@60900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60900 0x100
|
||||
0x60b00 0x100>;
|
||||
@@ -228,7 +192,7 @@
|
||||
compatible = "marvell,armada-xp-neta";
|
||||
};
|
||||
|
||||
crypto@90000 {
|
||||
cesa: crypto@90000 {
|
||||
compatible = "marvell,armada-xp-crypto";
|
||||
reg = <0x90000 0x10000>;
|
||||
reg-names = "regs";
|
||||
@@ -248,7 +212,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xor@f0900 {
|
||||
xor0: xor@f0900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0xF0900 0x100
|
||||
0xF0B00 0x100>;
|
||||
@@ -309,6 +273,44 @@
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11000 0x100>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11100 0x100>;
|
||||
};
|
||||
|
||||
&mpic {
|
||||
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
|
||||
};
|
||||
|
||||
&timer {
|
||||
compatible = "marvell,armada-xp-timer";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
compatible = "marvell,armada-xp-wdt";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
&cpurst {
|
||||
reg = <0x20800 0x20>;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
clocks = <&gateclk 18>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
clocks = <&gateclk 19>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
ge0_gmii_pins: ge0-gmii-pins {
|
||||
marvell,pins =
|
||||
|
||||
@@ -46,6 +46,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ðernet {
|
||||
status = "okay";
|
||||
|
||||
|
||||
@@ -67,7 +67,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
syscon {
|
||||
syscon: syscon@f8000000 {
|
||||
compatible = "axis,artpec6-syscon", "syscon";
|
||||
reg = <0xf8000000 0x48>;
|
||||
};
|
||||
@@ -154,6 +154,33 @@
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
|
||||
pcie: pcie@f8050000 {
|
||||
compatible = "axis,artpec6-pcie", "snps,dw-pcie";
|
||||
reg = <0xf8050000 0x2000
|
||||
0xf8040000 0x1000
|
||||
0xc0000000 0x2000>;
|
||||
reg-names = "dbi", "phy", "config";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
/* downstream I/O */
|
||||
ranges = <0x81000000 0 0 0xc0002000 0 0x00010000
|
||||
/* non-prefetchable memory */
|
||||
0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>;
|
||||
num-lanes = <2>;
|
||||
bus-range = <0x00 0xff>;
|
||||
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "msi";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
|
||||
axis,syscon-pcie = <&syscon>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
amba@0 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <0x1>;
|
||||
|
||||
@@ -12,8 +12,8 @@
|
||||
#include "sama5d4.dtsi"
|
||||
|
||||
/ {
|
||||
model = "DENX MA5D4";
|
||||
compatible = "denx,ma5d4", "atmel,sama5d4", "atmel,sama5";
|
||||
model = "Aries/DENX MA5D4";
|
||||
compatible = "aries,ma5d4", "denx,ma5d4", "atmel,sama5d4", "atmel,sama5";
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x10000000>;
|
||||
|
||||
@@ -13,8 +13,8 @@
|
||||
#include "at91-sama5d4_ma5d4.dtsi"
|
||||
|
||||
/ {
|
||||
model = "DENX MA5D4EVK";
|
||||
compatible = "denx,ma5d4evk", "atmel,sama5d4", "atmel,sama5";
|
||||
model = "Aries/DENX MA5D4EVK";
|
||||
compatible = "aries,ma5d4evk", "denx,ma5d4evk", "atmel,sama5d4", "atmel,sama5";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial3:115200n8";
|
||||
|
||||
@@ -481,8 +481,8 @@
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */
|
||||
AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */
|
||||
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
|
||||
AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -412,8 +412,8 @@
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
|
||||
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */
|
||||
<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
|
||||
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -174,14 +174,14 @@
|
||||
label = "Button 3";
|
||||
gpios = <&pioA 30 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x103>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
btn4 {
|
||||
label = "Button 4";
|
||||
gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x104>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -302,8 +302,8 @@
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -412,8 +412,8 @@
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
|
||||
AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
|
||||
<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
|
||||
AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -478,8 +478,8 @@
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
|
||||
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
|
||||
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
|
||||
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -500,8 +500,8 @@
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
|
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
|
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -438,8 +438,8 @@
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
|
||||
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -460,8 +460,8 @@
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
|
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
|
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -91,6 +91,13 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
otp: otp@0301c800 {
|
||||
compatible = "brcm,ocotp";
|
||||
reg = <0x0301c800 0x2c>;
|
||||
brcm,ocotp-size = <2048>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie_phy: phy@0301d0a0 {
|
||||
compatible = "brcm,cygnus-pcie-phy";
|
||||
reg = <0x0301d0a0 0x14>;
|
||||
@@ -108,12 +115,21 @@
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl: pinctrl@0x0301d0c8 {
|
||||
pinctrl: pinctrl@0301d0c8 {
|
||||
compatible = "brcm,cygnus-pinmux";
|
||||
reg = <0x0301d0c8 0x30>,
|
||||
<0x0301d24c 0x2c>;
|
||||
};
|
||||
|
||||
mailbox: mailbox@03024024 {
|
||||
compatible = "brcm,iproc-mailbox";
|
||||
reg = <0x03024024 0x40>;
|
||||
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
#mbox-cells = <1>;
|
||||
};
|
||||
|
||||
gpio_crmu: gpio@03024800 {
|
||||
compatible = "brcm,cygnus-crmu-gpio";
|
||||
reg = <0x03024800 0x50>,
|
||||
@@ -121,6 +137,9 @@
|
||||
ngpios = <6>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&mailbox>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
i2c0: i2c@18008000 {
|
||||
|
||||
@@ -160,7 +160,7 @@
|
||||
|
||||
axi {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x00000000 0x18000000 0x0011ba08>;
|
||||
ranges = <0x00000000 0x18000000 0x0011c40a>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
@@ -241,6 +241,16 @@
|
||||
brcm,nand-has-wp;
|
||||
};
|
||||
|
||||
gpiob: gpio@30000 {
|
||||
compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
|
||||
reg = <0x30000 0x50>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
ngpios = <4>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pwm: pwm@31000 {
|
||||
compatible = "brcm,iproc-pwm";
|
||||
reg = <0x31000 0x28>;
|
||||
@@ -254,6 +264,35 @@
|
||||
reg = <0x33000 0x14>;
|
||||
};
|
||||
|
||||
qspi: qspi@27200 {
|
||||
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
|
||||
reg = <0x027200 0x184>,
|
||||
<0x027000 0x124>,
|
||||
<0x11c408 0x004>,
|
||||
<0x0273a0 0x01c>;
|
||||
reg-names = "mspi", "bspi", "intr_regs",
|
||||
"intr_status_reg";
|
||||
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "spi_lr_fullness_reached",
|
||||
"spi_lr_session_aborted",
|
||||
"spi_lr_impatient",
|
||||
"spi_lr_session_done",
|
||||
"spi_lr_overhead",
|
||||
"mspi_done",
|
||||
"mspi_halted";
|
||||
clocks = <&iprocmed>;
|
||||
clock-names = "iprocmed";
|
||||
num-cs = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
ccbtimer0: timer@34000 {
|
||||
compatible = "arm,sp804";
|
||||
reg = <0x34000 0x1000>;
|
||||
|
||||
@@ -22,7 +22,72 @@
|
||||
};
|
||||
|
||||
&gpio {
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
|
||||
/*
|
||||
* This is based on the unreleased schematic for the Model A+.
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"GPIO5",
|
||||
"GPIO6",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"GPIO12",
|
||||
"GPIO13",
|
||||
/* Serial port */
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
"GPIO16",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"GPIO19",
|
||||
"GPIO20",
|
||||
"GPIO21",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"GPIO26",
|
||||
"GPIO27",
|
||||
"SDA0",
|
||||
"SCL0",
|
||||
"NC", /* GPIO30 */
|
||||
"NC", /* GPIO31 */
|
||||
"CAM_GPIO1", /* GPIO32 */
|
||||
"NC", /* GPIO33 */
|
||||
"NC", /* GPIO34 */
|
||||
"PWR_LOW_N", /* GPIO35 */
|
||||
"NC", /* GPIO36 */
|
||||
"NC", /* GPIO37 */
|
||||
"USB_LIMIT", /* GPIO38 */
|
||||
"NC", /* GPIO39 */
|
||||
"PWM0_OUT", /* GPIO40 */
|
||||
"CAM_GPIO0", /* GPIO41 */
|
||||
"NC", /* GPIO42 */
|
||||
"NC", /* GPIO43 */
|
||||
"NC", /* GPIO44 */
|
||||
"PWM1_OUT", /* GPIO45 */
|
||||
"HDMI_HPD_N",
|
||||
"STATUS_LED",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
|
||||
|
||||
/* I2S interface */
|
||||
i2s_alt0: i2s_alt0 {
|
||||
|
||||
@@ -15,7 +15,74 @@
|
||||
};
|
||||
|
||||
&gpio {
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
|
||||
/*
|
||||
* Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf
|
||||
* RPI00021 sheet 02
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"CAM_GPIO1",
|
||||
"LAN_RUN",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"NC", /* GPIO12 */
|
||||
"NC", /* GPIO13 */
|
||||
/* Serial port */
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
"STATUS_LED_N",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"NC", /* GPIO19 */
|
||||
"NC", /* GPIO20 */
|
||||
"GPIO21",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"NC", /* GPIO26 */
|
||||
"CAM_GPIO0",
|
||||
/* Binary number representing build/revision */
|
||||
"CONFIG0",
|
||||
"CONFIG1",
|
||||
"CONFIG2",
|
||||
"CONFIG3",
|
||||
"NC", /* GPIO32 */
|
||||
"NC", /* GPIO33 */
|
||||
"NC", /* GPIO34 */
|
||||
"NC", /* GPIO35 */
|
||||
"NC", /* GPIO36 */
|
||||
"NC", /* GPIO37 */
|
||||
"NC", /* GPIO38 */
|
||||
"NC", /* GPIO39 */
|
||||
"PWM0_OUT",
|
||||
"NC", /* GPIO41 */
|
||||
"NC", /* GPIO42 */
|
||||
"NC", /* GPIO43 */
|
||||
"NC", /* GPIO44 */
|
||||
"PWM1_OUT",
|
||||
"HDMI_HPD_P",
|
||||
"SD_CARD_DET",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
|
||||
|
||||
/* I2S interface */
|
||||
i2s_alt2: i2s_alt2 {
|
||||
|
||||
@@ -23,7 +23,73 @@
|
||||
};
|
||||
|
||||
&gpio {
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
|
||||
/*
|
||||
* Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf
|
||||
* RPI-BPLUS sheet 1
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"GPIO5",
|
||||
"GPIO6",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"GPIO12",
|
||||
"GPIO13",
|
||||
/* Serial port */
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
"GPIO16",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"GPIO19",
|
||||
"GPIO20",
|
||||
"GPIO21",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"GPIO26",
|
||||
"GPIO27",
|
||||
"SDA0",
|
||||
"SCL0",
|
||||
"NC", /* GPIO30 */
|
||||
"LAN_RUN", /* GPIO31 */
|
||||
"CAM_GPIO1", /* GPIO32 */
|
||||
"NC", /* GPIO33 */
|
||||
"NC", /* GPIO34 */
|
||||
"PWR_LOW_N", /* GPIO35 */
|
||||
"NC", /* GPIO36 */
|
||||
"NC", /* GPIO37 */
|
||||
"USB_LIMIT", /* GPIO38 */
|
||||
"NC", /* GPIO39 */
|
||||
"PWM0_OUT", /* GPIO40 */
|
||||
"CAM_GPIO0", /* GPIO41 */
|
||||
"NC", /* GPIO42 */
|
||||
"NC", /* GPIO43 */
|
||||
"ETHCLK", /* GPIO44 */
|
||||
"PWM1_OUT", /* GPIO45 */
|
||||
"HDMI_HPD_N",
|
||||
"STATUS_LED",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
|
||||
|
||||
/* I2S interface */
|
||||
i2s_alt0: i2s_alt0 {
|
||||
|
||||
@@ -16,7 +16,73 @@
|
||||
};
|
||||
|
||||
&gpio {
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
|
||||
/*
|
||||
* Taken from Raspberry-Pi-Rev-2.0-Model-AB-Schematics.pdf
|
||||
* RPI00022 sheet 02
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"CAM_CLK",
|
||||
"LAN_RUN",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"NC", /* GPIO12 */
|
||||
"NC", /* GPIO13 */
|
||||
/* Serial port */
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
"STATUS_LED_N",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"NC", /* GPIO19 */
|
||||
"NC", /* GPIO20 */
|
||||
"CAM_GPIO",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"NC", /* GPIO26 */
|
||||
"GPIO27",
|
||||
"GPIO28",
|
||||
"GPIO29",
|
||||
"GPIO30",
|
||||
"GPIO31",
|
||||
"NC", /* GPIO32 */
|
||||
"NC", /* GPIO33 */
|
||||
"NC", /* GPIO34 */
|
||||
"NC", /* GPIO35 */
|
||||
"NC", /* GPIO36 */
|
||||
"NC", /* GPIO37 */
|
||||
"NC", /* GPIO38 */
|
||||
"NC", /* GPIO39 */
|
||||
"PWM0_OUT",
|
||||
"NC", /* GPIO41 */
|
||||
"NC", /* GPIO42 */
|
||||
"NC", /* GPIO43 */
|
||||
"NC", /* GPIO44 */
|
||||
"PWM1_OUT",
|
||||
"HDMI_HPD_P",
|
||||
"SD_CARD_DET",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
|
||||
|
||||
/* I2S interface */
|
||||
i2s_alt2: i2s_alt2 {
|
||||
|
||||
@@ -16,7 +16,74 @@
|
||||
};
|
||||
|
||||
&gpio {
|
||||
pinctrl-0 = <&gpioout &alt0 &alt3>;
|
||||
/*
|
||||
* Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf
|
||||
* RPI00021 sheet 02
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"CAM_GPIO1",
|
||||
"LAN_RUN",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"NC", /* GPIO12 */
|
||||
"NC", /* GPIO13 */
|
||||
/* Serial port */
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
"STATUS_LED_N",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"NC", /* GPIO19 */
|
||||
"NC", /* GPIO20 */
|
||||
"GPIO21",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"NC", /* GPIO26 */
|
||||
"CAM_GPIO0",
|
||||
/* Binary number representing build/revision */
|
||||
"CONFIG0",
|
||||
"CONFIG1",
|
||||
"CONFIG2",
|
||||
"CONFIG3",
|
||||
"NC", /* GPIO32 */
|
||||
"NC", /* GPIO33 */
|
||||
"NC", /* GPIO34 */
|
||||
"NC", /* GPIO35 */
|
||||
"NC", /* GPIO36 */
|
||||
"NC", /* GPIO37 */
|
||||
"NC", /* GPIO38 */
|
||||
"NC", /* GPIO39 */
|
||||
"PWM0_OUT",
|
||||
"NC", /* GPIO41 */
|
||||
"NC", /* GPIO42 */
|
||||
"NC", /* GPIO43 */
|
||||
"NC", /* GPIO44 */
|
||||
"PWM1_OUT",
|
||||
"HDMI_HPD_P",
|
||||
"SD_CARD_DET",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
|
||||
pinctrl-0 = <&gpioout &alt0>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
|
||||
@@ -26,7 +26,72 @@
|
||||
};
|
||||
|
||||
&gpio {
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
|
||||
/*
|
||||
* This is based on the official GPU firmware DT blob.
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"GPIO5",
|
||||
"GPIO6",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"GPIO12",
|
||||
"GPIO13",
|
||||
/* Serial port */
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
"GPIO16",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"GPIO19",
|
||||
"GPIO20",
|
||||
"GPIO21",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"GPIO26",
|
||||
"GPIO27",
|
||||
"SDA0",
|
||||
"SCL0",
|
||||
"NC", /* GPIO30 */
|
||||
"NC", /* GPIO31 */
|
||||
"CAM_GPIO1", /* GPIO32 */
|
||||
"NC", /* GPIO33 */
|
||||
"NC", /* GPIO34 */
|
||||
"NC", /* GPIO35 */
|
||||
"NC", /* GPIO36 */
|
||||
"NC", /* GPIO37 */
|
||||
"NC", /* GPIO38 */
|
||||
"NC", /* GPIO39 */
|
||||
"NC", /* GPIO40 */
|
||||
"CAM_GPIO0", /* GPIO41 */
|
||||
"NC", /* GPIO42 */
|
||||
"NC", /* GPIO43 */
|
||||
"NC", /* GPIO44 */
|
||||
"NC", /* GPIO45 */
|
||||
"HDMI_HPD_N",
|
||||
"STATUS_LED_N",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
|
||||
|
||||
/* I2S interface */
|
||||
i2s_alt0: i2s_alt0 {
|
||||
|
||||
@@ -39,22 +39,21 @@
|
||||
};
|
||||
|
||||
alt0: alt0 {
|
||||
brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>;
|
||||
brcm,pins = <4 5 7 8 9 10 11 14 15>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
|
||||
alt3: alt3 {
|
||||
brcm,pins = <48 49 50 51 52 53>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_gpio0>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_gpio2>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
@@ -64,11 +63,15 @@
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_gpio48>;
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -23,3 +23,9 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* enable thermal sensor with the correct compatible property set */
|
||||
&thermal {
|
||||
compatible = "brcm,bcm2835-thermal";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
};
|
||||
|
||||
&gpio {
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
|
||||
|
||||
/* I2S interface */
|
||||
i2s_alt0: i2s_alt0 {
|
||||
|
||||
@@ -76,3 +76,9 @@
|
||||
interrupt-parent = <&local_intc>;
|
||||
interrupts = <8>;
|
||||
};
|
||||
|
||||
/* enable thermal sensor with the correct compatible property set */
|
||||
&thermal {
|
||||
compatible = "brcm,bcm2836-thermal";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -104,7 +104,7 @@
|
||||
reg = <0x7e104000 0x10>;
|
||||
};
|
||||
|
||||
mailbox: mailbox@7e00b800 {
|
||||
mailbox: mailbox@7e00b880 {
|
||||
compatible = "brcm,bcm2835-mbox";
|
||||
reg = <0x7e00b880 0x40>;
|
||||
interrupts = <0 1>;
|
||||
@@ -132,6 +132,209 @@
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
/* Defines pin muxing groups according to
|
||||
* BCM2835-ARM-Peripherals.pdf page 102.
|
||||
*
|
||||
* While each pin can have its mux selected
|
||||
* for various functions individually, some
|
||||
* groups only make sense to switch to a
|
||||
* particular function together.
|
||||
*/
|
||||
dpi_gpio0: dpi_gpio0 {
|
||||
brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
|
||||
12 13 14 15 16 17 18 19
|
||||
20 21 22 23 24 25 26 27>;
|
||||
brcm,function = <BCM2835_FSEL_ALT2>;
|
||||
};
|
||||
emmc_gpio22: emmc_gpio22 {
|
||||
brcm,pins = <22 23 24 25 26 27>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
emmc_gpio34: emmc_gpio34 {
|
||||
brcm,pins = <34 35 36 37 38 39>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
brcm,pull = <BCM2835_PUD_OFF
|
||||
BCM2835_PUD_UP
|
||||
BCM2835_PUD_UP
|
||||
BCM2835_PUD_UP
|
||||
BCM2835_PUD_UP
|
||||
BCM2835_PUD_UP>;
|
||||
};
|
||||
emmc_gpio48: emmc_gpio48 {
|
||||
brcm,pins = <48 49 50 51 52 53>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
|
||||
gpclk0_gpio4: gpclk0_gpio4 {
|
||||
brcm,pins = <4>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
gpclk1_gpio5: gpclk1_gpio5 {
|
||||
brcm,pins = <5>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
gpclk1_gpio42: gpclk1_gpio42 {
|
||||
brcm,pins = <42>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
gpclk1_gpio44: gpclk1_gpio44 {
|
||||
brcm,pins = <44>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
gpclk2_gpio6: gpclk2_gpio6 {
|
||||
brcm,pins = <6>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
gpclk2_gpio43: gpclk2_gpio43 {
|
||||
brcm,pins = <43>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
|
||||
i2c0_gpio0: i2c0_gpio0 {
|
||||
brcm,pins = <0 1>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
i2c0_gpio32: i2c0_gpio32 {
|
||||
brcm,pins = <32 34>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
i2c0_gpio44: i2c0_gpio44 {
|
||||
brcm,pins = <44 45>;
|
||||
brcm,function = <BCM2835_FSEL_ALT1>;
|
||||
};
|
||||
i2c1_gpio2: i2c1_gpio2 {
|
||||
brcm,pins = <2 3>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
i2c1_gpio44: i2c1_gpio44 {
|
||||
brcm,pins = <44 45>;
|
||||
brcm,function = <BCM2835_FSEL_ALT2>;
|
||||
};
|
||||
i2c_slave_gpio18: i2c_slave_gpio18 {
|
||||
brcm,pins = <18 19 20 21>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
|
||||
jtag_gpio4: jtag_gpio4 {
|
||||
brcm,pins = <4 5 6 12 13>;
|
||||
brcm,function = <BCM2835_FSEL_ALT4>;
|
||||
};
|
||||
jtag_gpio22: jtag_gpio22 {
|
||||
brcm,pins = <22 23 24 25 26 27>;
|
||||
brcm,function = <BCM2835_FSEL_ALT4>;
|
||||
};
|
||||
|
||||
pcm_gpio18: pcm_gpio18 {
|
||||
brcm,pins = <18 19 20 21>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
pcm_gpio28: pcm_gpio28 {
|
||||
brcm,pins = <28 29 30 31>;
|
||||
brcm,function = <BCM2835_FSEL_ALT2>;
|
||||
};
|
||||
|
||||
pwm0_gpio12: pwm0_gpio12 {
|
||||
brcm,pins = <12>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
pwm0_gpio18: pwm0_gpio18 {
|
||||
brcm,pins = <18>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
pwm0_gpio40: pwm0_gpio40 {
|
||||
brcm,pins = <40>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
pwm1_gpio13: pwm1_gpio13 {
|
||||
brcm,pins = <13>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
pwm1_gpio19: pwm1_gpio19 {
|
||||
brcm,pins = <19>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
pwm1_gpio41: pwm1_gpio41 {
|
||||
brcm,pins = <41>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
pwm1_gpio45: pwm1_gpio45 {
|
||||
brcm,pins = <45>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
|
||||
sdhost_gpio48: sdhost_gpio48 {
|
||||
brcm,pins = <48 49 50 51 52 53>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
|
||||
spi0_gpio7: spi0_gpio7 {
|
||||
brcm,pins = <7 8 9 10 11>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
spi0_gpio35: spi0_gpio35 {
|
||||
brcm,pins = <35 36 37 38 39>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
spi1_gpio16: spi1_gpio16 {
|
||||
brcm,pins = <16 17 18 19 20 21>;
|
||||
brcm,function = <BCM2835_FSEL_ALT4>;
|
||||
};
|
||||
spi2_gpio40: spi2_gpio40 {
|
||||
brcm,pins = <40 41 42 43 44 45>;
|
||||
brcm,function = <BCM2835_FSEL_ALT4>;
|
||||
};
|
||||
|
||||
uart0_gpio14: uart0_gpio14 {
|
||||
brcm,pins = <14 15>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
/* Separate from the uart0_gpio14 group
|
||||
* because it conflicts with spi1_gpio16, and
|
||||
* people often run uart0 on the two pins
|
||||
* without flow contrl.
|
||||
*/
|
||||
uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
|
||||
brcm,pins = <16 17>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
uart0_gpio30: uart0_gpio30 {
|
||||
brcm,pins = <30 31>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
|
||||
brcm,pins = <32 33>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
|
||||
uart1_gpio14: uart1_gpio14 {
|
||||
brcm,pins = <14 15>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
|
||||
brcm,pins = <16 17>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
uart1_gpio32: uart1_gpio32 {
|
||||
brcm,pins = <32 33>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
|
||||
brcm,pins = <30 31>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
uart1_gpio36: uart1_gpio36 {
|
||||
brcm,pins = <36 37 38 39>;
|
||||
brcm,function = <BCM2835_FSEL_ALT2>;
|
||||
};
|
||||
uart1_gpio40: uart1_gpio40 {
|
||||
brcm,pins = <40 41>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
|
||||
brcm,pins = <42 43>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
};
|
||||
|
||||
uart0: serial@7e201000 {
|
||||
@@ -187,6 +390,13 @@
|
||||
interrupts = <2 14>; /* pwa1 */
|
||||
};
|
||||
|
||||
thermal: thermal@7e212000 {
|
||||
compatible = "brcm,bcm2835-thermal";
|
||||
reg = <0x7e212000 0x8>;
|
||||
clocks = <&clocks BCM2835_CLOCK_TSENS>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
aux: aux@0x7e215000 {
|
||||
compatible = "brcm,bcm2835-aux";
|
||||
#clock-cells = <1>;
|
||||
|
||||
64
arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
Звичайний файл
64
arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
Звичайний файл
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Copyright 2016 Luxul Inc.
|
||||
*
|
||||
* Licensed under the ISC license.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "luxul,xap-1510v1", "brcm,bcm4708";
|
||||
model = "Luxul XAP-1510 V1";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlycon";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
5ghz {
|
||||
label = "bcm53xx:blue:5ghz";
|
||||
gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
|
||||
2ghz {
|
||||
label = "bcm53xx:blue:2ghz";
|
||||
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
|
||||
status {
|
||||
label = "bcm53xx:green:status";
|
||||
gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi_nor {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -9,7 +9,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm4709.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm4709.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm4709.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm4709.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
@@ -107,6 +107,10 @@
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
114
arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
Звичайний файл
114
arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
Звичайний файл
@@ -0,0 +1,114 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
|
||||
*
|
||||
* Licensed under the ISC license.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4709.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "tplink,archer-c9-v1", "brcm,bcm4709", "brcm,bcm4708";
|
||||
model = "TP-LINK Archer C9 V1";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlycon";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
lan {
|
||||
label = "bcm53xx:blue:lan";
|
||||
gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "bcm53xx:blue:wps";
|
||||
gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
2ghz {
|
||||
label = "bcm53xx:blue:2ghz";
|
||||
gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
5ghz {
|
||||
label = "bcm53xx:blue:5ghz";
|
||||
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
usb3 {
|
||||
label = "bcm53xx:blue:usb3";
|
||||
gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
usb2 {
|
||||
label = "bcm53xx:blue:usb2";
|
||||
gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wan-blue {
|
||||
label = "bcm53xx:blue:wan";
|
||||
gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wan-amber {
|
||||
label = "bcm53xx:amber:wan";
|
||||
gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
power {
|
||||
label = "bcm53xx:blue:power";
|
||||
gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wps {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
vcc-gpio = <&chipcommon 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
vcc-gpio = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&spi_nor {
|
||||
status = "okay";
|
||||
};
|
||||
11
arch/arm/boot/dts/bcm4709.dtsi
Звичайний файл
11
arch/arm/boot/dts/bcm4709.dtsi
Звичайний файл
@@ -0,0 +1,11 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
|
||||
*
|
||||
* Licensed under the ISC license.
|
||||
*/
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
|
||||
&uart0 {
|
||||
clock-frequency = <125000000>;
|
||||
};
|
||||
@@ -9,7 +9,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm47094.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch1.dtsi"
|
||||
|
||||
/ {
|
||||
@@ -107,7 +107,6 @@
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
clock-frequency = <125000000>;
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
|
||||
111
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
Звичайний файл
111
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
Звичайний файл
@@ -0,0 +1,111 @@
|
||||
/*
|
||||
* Copyright 2016 Luxul Inc.
|
||||
*
|
||||
* Licensed under the ISC license.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm47094.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch4.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "luxul,xwr-3100v1", "brcm,bcm47094", "brcm,bcm4708";
|
||||
model = "Luxul XWR-3100 V1";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlycon";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
power {
|
||||
label = "bcm53xx:green:power";
|
||||
gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
lan3 {
|
||||
label = "bcm53xx:green:lan1";
|
||||
gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
lan4 {
|
||||
label = "bcm53xx:green:lan0";
|
||||
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wan {
|
||||
label = "bcm53xx:green:wan";
|
||||
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
lan1 {
|
||||
label = "bcm53xx:green:lan3";
|
||||
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
lan2 {
|
||||
label = "bcm53xx:green:lan2";
|
||||
gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
usb3 {
|
||||
label = "bcm53xx:green:usb3";
|
||||
gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
status {
|
||||
label = "bcm53xx:green:status";
|
||||
gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
2ghz {
|
||||
label = "bcm53xx:green:2ghz";
|
||||
gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
5ghz {
|
||||
label = "bcm53xx:green:5ghz";
|
||||
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&spi_nor {
|
||||
status = "okay";
|
||||
};
|
||||
103
arch/arm/boot/dts/bcm47094-netgear-r8500.dts
Звичайний файл
103
arch/arm/boot/dts/bcm47094-netgear-r8500.dts
Звичайний файл
@@ -0,0 +1,103 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
|
||||
*
|
||||
* Licensed under the ISC license.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm47094.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "netgear,r8500", "brcm,bcm47094", "brcm,bcm4708";
|
||||
model = "Netgear R8500";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
power0 {
|
||||
label = "bcm53xx:white:power";
|
||||
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
power1 {
|
||||
label = "bcm53xx:amber:power";
|
||||
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
5ghz-1 {
|
||||
label = "bcm53xx:white:5ghz-1";
|
||||
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
5ghz-2 {
|
||||
label = "bcm53xx:white:5ghz-2";
|
||||
gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
2ghz {
|
||||
label = "bcm53xx:white:2ghz";
|
||||
gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
usb2 {
|
||||
label = "bcm53xx:white:usb2";
|
||||
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
usb3 {
|
||||
label = "bcm53xx:white:usb3";
|
||||
gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
brightness {
|
||||
label = "Backlight";
|
||||
linux,code = <KEY_BRIGHTNESS_ZERO>;
|
||||
gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
rfkill {
|
||||
label = "WiFi";
|
||||
linux,code = <KEY_RFKILL>;
|
||||
gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
17
arch/arm/boot/dts/bcm47094.dtsi
Звичайний файл
17
arch/arm/boot/dts/bcm47094.dtsi
Звичайний файл
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
|
||||
*
|
||||
* Licensed under the ISC license.
|
||||
*/
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
|
||||
/ {
|
||||
usb3_phy: usb3-phy {
|
||||
compatible = "brcm,ns-bx-usb3-phy";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
clock-frequency = <125000000>;
|
||||
};
|
||||
74
arch/arm/boot/dts/bcm47189-tenda-ac9.dts
Звичайний файл
74
arch/arm/boot/dts/bcm47189-tenda-ac9.dts
Звичайний файл
@@ -0,0 +1,74 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
|
||||
*
|
||||
* Licensed under the ISC license.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm53573.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "tenda,ac9", "brcm,bcm47189", "brcm,bcm53573";
|
||||
model = "Tenda AC9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlycon";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
usb {
|
||||
label = "bcm53xx:blue:usb";
|
||||
gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "bcm53xx:blue:wps";
|
||||
gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
5ghz {
|
||||
label = "bcm53xx:blue:5ghz";
|
||||
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
system {
|
||||
label = "bcm53xx:blue:system";
|
||||
gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rfkill {
|
||||
label = "WiFi";
|
||||
linux,code = <KEY_RFKILL>;
|
||||
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
13
arch/arm/boot/dts/bcm5301x-nand-cs0-bch4.dtsi
Звичайний файл
13
arch/arm/boot/dts/bcm5301x-nand-cs0-bch4.dtsi
Звичайний файл
@@ -0,0 +1,13 @@
|
||||
/*
|
||||
* Copyright 2016 Luxul Inc.
|
||||
*
|
||||
* Licensed under the ISC license.
|
||||
*/
|
||||
|
||||
#include "bcm5301x-nand-cs0.dtsi"
|
||||
|
||||
&nandcs {
|
||||
nand-ecc-algo = "bch";
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
};
|
||||
@@ -149,6 +149,13 @@
|
||||
clock-names = "phy-ref-clk";
|
||||
};
|
||||
|
||||
usb3_phy: usb3-phy {
|
||||
compatible = "brcm,ns-ax-usb3-phy";
|
||||
reg = <0x18105000 0x1000>, <0x18003000 0x1000>;
|
||||
reg-names = "dmp", "ccb-mii";
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
axi@18000000 {
|
||||
compatible = "brcm,bus-axi";
|
||||
reg = <0x18000000 0x1000>;
|
||||
|
||||
159
arch/arm/boot/dts/bcm53573.dtsi
Звичайний файл
159
arch/arm/boot/dts/bcm53573.dtsi
Звичайний файл
@@ -0,0 +1,159 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
|
||||
*
|
||||
* Licensed under the ISC license.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
mpcore {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x00000000 0x18310000 0x00008000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
gic: interrupt-controller@1000 {
|
||||
compatible = "arm,cortex-a7-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
reg = <0x1000 0x1000>,
|
||||
<0x2000 0x0100>;
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
alp: oscillator {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <40000000>;
|
||||
};
|
||||
};
|
||||
|
||||
axi@18000000 {
|
||||
compatible = "brcm,bus-axi";
|
||||
reg = <0x18000000 0x1000>;
|
||||
ranges = <0x00000000 0x18000000 0x00100000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x000fffff 0xffff>;
|
||||
interrupt-map =
|
||||
/* ChipCommon */
|
||||
<0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* IEEE 802.11 0 */
|
||||
<0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* PCIe Controller 0 */
|
||||
<0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* USB 2.0 Controller */
|
||||
<0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* Ethernet Controller 0 */
|
||||
<0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* IEEE 802.11 1 */
|
||||
<0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* Ethernet Controller 1 */
|
||||
<0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
chipcommon: chipcommon@0 {
|
||||
compatible = "simple-bus";
|
||||
reg = <0x00000000 0x1000>;
|
||||
ranges;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
uart0: serial@0300 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x0300 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&alp>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb2: usb2@4000 {
|
||||
reg = <0x4000 0x1000>;
|
||||
ranges;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ehci: ehci@4000 {
|
||||
compatible = "generic-ehci";
|
||||
reg = <0x4000 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
ohci: ohci@d000 {
|
||||
#usb-cells = <0>;
|
||||
|
||||
compatible = "generic-ohci";
|
||||
reg = <0xd000 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
gmac0: ethernet@5000 {
|
||||
reg = <0x5000 0x1000>;
|
||||
};
|
||||
|
||||
gmac1: ethernet@b000 {
|
||||
reg = <0xb000 0x1000>;
|
||||
};
|
||||
|
||||
pmu@12000 {
|
||||
compatible = "simple-mfd", "syscon";
|
||||
reg = <0x00012000 0x00001000>;
|
||||
|
||||
ilp: ilp {
|
||||
compatible = "brcm,bcm53573-ilp";
|
||||
clocks = <&alp>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "ilp";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -139,3 +139,37 @@
|
||||
groups = "nand_grp";
|
||||
};
|
||||
};
|
||||
|
||||
&qspi {
|
||||
bspi-sel = <0>;
|
||||
flash: m25p80@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "m25p80";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <12500000>;
|
||||
m25p,fast-read;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
|
||||
partition@0 {
|
||||
label = "boot";
|
||||
reg = <0x00000000 0x000a0000>;
|
||||
};
|
||||
|
||||
partition@a0000 {
|
||||
label = "env";
|
||||
reg = <0x000a0000 0x00060000>;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "system";
|
||||
reg = <0x00100000 0x00600000>;
|
||||
};
|
||||
|
||||
partition@700000 {
|
||||
label = "rootfs";
|
||||
reg = <0x00700000 0x01900000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -48,7 +48,7 @@
|
||||
reg = <0x00000000 0x80000000>;
|
||||
};
|
||||
|
||||
choosen {
|
||||
chosen {
|
||||
bootargs = "earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
@@ -58,7 +58,7 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
reg_usb0_vbus: regulator@0 {
|
||||
reg_usb0_vbus: regulator_usb0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb0_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@@ -67,7 +67,7 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_usb1_vbus: regulator@1 {
|
||||
reg_usb1_vbus: regulator_usb1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@@ -76,7 +76,7 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_usb2_vbus: regulator@2 {
|
||||
reg_usb2_vbus: regulator_usb2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb2_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
@@ -85,7 +85,7 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_sdio1_vmmc: regulator@3 {
|
||||
reg_sdio1_vmmc: regulator_sdio1_vmmc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
@@ -95,7 +95,7 @@
|
||||
gpio = <&portb 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
reg_sdio1_vqmmc: regulator@4 {
|
||||
reg_sdio1_vqmmc: regulator_sido1_vqmmc {
|
||||
compatible = "regulator-gpio";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
94
arch/arm/boot/dts/cloudengines-pogoplug-series-3.dts
Звичайний файл
94
arch/arm/boot/dts/cloudengines-pogoplug-series-3.dts
Звичайний файл
@@ -0,0 +1,94 @@
|
||||
/*
|
||||
* cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3
|
||||
*
|
||||
* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "ox820.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Cloud Engines PogoPlug Series 3";
|
||||
|
||||
compatible = "cloudengines,pogoplugv3", "oxsemi,ox820";
|
||||
|
||||
chosen {
|
||||
bootargs = "earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
/* 128Mbytes DDR */
|
||||
reg = <0x60000000 0x8000000>;
|
||||
};
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
blue {
|
||||
label = "pogoplug:blue";
|
||||
gpios = <&gpio0 2 0>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
orange {
|
||||
label = "pogoplug:orange";
|
||||
gpios = <&gpio1 16 1>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
green {
|
||||
label = "pogoplug:green";
|
||||
gpios = <&gpio1 17 1>;
|
||||
default-state = "keep";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
};
|
||||
|
||||
&nandc {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-ecc-algo = "hamming";
|
||||
|
||||
partition@0 {
|
||||
label = "boot";
|
||||
reg = <0x00000000 0x00e00000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@e00000 {
|
||||
label = "ubi";
|
||||
reg = <0x00e00000 0x07200000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ða {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_etha_mdio>;
|
||||
};
|
||||
@@ -13,6 +13,7 @@
|
||||
|
||||
aliases {
|
||||
serial2 = &serial2;
|
||||
ethernet0 = ð0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@@ -122,7 +123,7 @@
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
cd-gpios = <&gpio 64 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -158,6 +159,14 @@
|
||||
rx-num-evt = <32>;
|
||||
};
|
||||
|
||||
&usb_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&aemif {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nand_pins>;
|
||||
@@ -219,3 +228,11 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&prictrl {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&memctrl {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -36,6 +36,7 @@
|
||||
reg = <0x14120 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <2>;
|
||||
pinctrl-single,bit-per-mux;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,function-mask = <0xf>;
|
||||
@@ -186,7 +187,43 @@
|
||||
0xc 0x88888888 0xffffffff
|
||||
>;
|
||||
};
|
||||
lcd_pins: pinmux_lcd_pins {
|
||||
pinctrl-single,bits = <
|
||||
/*
|
||||
* LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
|
||||
* LCD_D[6], LCD_D[7]
|
||||
*/
|
||||
0x40 0x22222200 0xffffff00
|
||||
/*
|
||||
* LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
|
||||
* LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
|
||||
*/
|
||||
0x44 0x22222222 0xffffffff
|
||||
/* LCD_D[8], LCD_D[9] */
|
||||
0x48 0x00000022 0x000000ff
|
||||
|
||||
/* LCD_PCLK */
|
||||
0x48 0x02000000 0x0f000000
|
||||
/* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
|
||||
0x4c 0x02000022 0x0f0000ff
|
||||
>;
|
||||
};
|
||||
|
||||
};
|
||||
prictrl: priority-controller@14110 {
|
||||
compatible = "ti,da850-mstpri";
|
||||
reg = <0x14110 0x0c>;
|
||||
status = "disabled";
|
||||
};
|
||||
cfgchip: chip-controller@1417c {
|
||||
compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
|
||||
reg = <0x1417c 0x14>;
|
||||
|
||||
usb_phy: usb-phy {
|
||||
compatible = "ti,da830-usb-phy";
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
edma0: edma@0 {
|
||||
compatible = "ti,edma3-tpcc";
|
||||
@@ -280,6 +317,8 @@
|
||||
mmc0: mmc@40000 {
|
||||
compatible = "ti,da830-mmc";
|
||||
reg = <0x40000 0x1000>;
|
||||
cap-sd-highspeed;
|
||||
cap-mmc-highspeed;
|
||||
interrupts = <16>;
|
||||
dmas = <&edma0 16 0>, <&edma0 17 0>;
|
||||
dma-names = "rx", "tx";
|
||||
@@ -288,6 +327,8 @@
|
||||
mmc1: mmc@21b000 {
|
||||
compatible = "ti,da830-mmc";
|
||||
reg = <0x21b000 0x1000>;
|
||||
cap-sd-highspeed;
|
||||
cap-mmc-highspeed;
|
||||
interrupts = <72>;
|
||||
dmas = <&edma1 28 0>, <&edma1 29 0>;
|
||||
dma-names = "rx", "tx";
|
||||
@@ -336,6 +377,8 @@
|
||||
num-cs = <6>;
|
||||
ti,davinci-spi-intr-line = <1>;
|
||||
interrupts = <20>;
|
||||
dmas = <&edma0 14 0>, <&edma0 15 0>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
spi1: spi@30e000 {
|
||||
@@ -350,6 +393,16 @@
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
usb0: usb@200000 {
|
||||
compatible = "ti,da830-musb";
|
||||
reg = <0x200000 0x10000>;
|
||||
interrupts = <58>;
|
||||
interrupt-names = "mc";
|
||||
dr_mode = "otg";
|
||||
phys = <&usb_phy 0>;
|
||||
phy-names = "usb-phy";
|
||||
status = "disabled";
|
||||
};
|
||||
mdio: mdio@224000 {
|
||||
compatible = "ti,davinci_mdio";
|
||||
#address-cells = <1>;
|
||||
@@ -386,6 +439,11 @@
|
||||
ti,davinci-gpio-unbanked = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
pinconf: pin-controller@22c00c {
|
||||
compatible = "ti,da850-pupd";
|
||||
reg = <0x22c00c 0x8>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp0: mcasp@100000 {
|
||||
compatible = "ti,da830-mcasp-audio";
|
||||
@@ -399,6 +457,13 @@
|
||||
<&edma0 0 1>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
display: display@213000 {
|
||||
compatible = "ti,da850-tilcdc";
|
||||
reg = <0x213000 0x1000>;
|
||||
interrupts = <52>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
aemif: aemif@68000000 {
|
||||
compatible = "ti,da850-aemif";
|
||||
@@ -410,4 +475,9 @@
|
||||
1 0 0x68000000 0x00008000>;
|
||||
status = "disabled";
|
||||
};
|
||||
memctrl: memory-controller@b0000000 {
|
||||
compatible = "ti,da850-ddr-controller";
|
||||
reg = <0xb0000000 0xe8>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -373,6 +373,7 @@
|
||||
reg = <0x800 0x438>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,function-mask = <0x307ff>;
|
||||
};
|
||||
|
||||
@@ -83,6 +83,7 @@
|
||||
reg = <0x48140000 0x21000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#pinctrl-cells = <1>;
|
||||
ranges = <0 0x48140000 0x21000>;
|
||||
|
||||
dm816x_pinmux: pinmux@800 {
|
||||
@@ -90,6 +91,7 @@
|
||||
reg = <0x800 0x50a>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0xf>;
|
||||
};
|
||||
|
||||
@@ -171,6 +171,7 @@
|
||||
reg = <0x1400 0x0468>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <32>;
|
||||
|
||||
230
arch/arm/boot/dts/dra71-evm.dts
Звичайний файл
230
arch/arm/boot/dts/dra71-evm.dts
Звичайний файл
@@ -0,0 +1,230 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include "dra72-evm-common.dtsi"
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
|
||||
/ {
|
||||
compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
|
||||
model = "TI DRA718 EVM";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
|
||||
};
|
||||
|
||||
vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
|
||||
compatible = "regulator-gpio";
|
||||
|
||||
regulator-name = "vddshv8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&evm_5v0>;
|
||||
|
||||
gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
|
||||
states = <1800000 0x0
|
||||
3000000 0x1>;
|
||||
};
|
||||
|
||||
poweroff: gpio-poweroff {
|
||||
compatible = "gpio-poweroff";
|
||||
gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
|
||||
input;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
lp8733: lp8733@60 {
|
||||
compatible = "ti,lp8733";
|
||||
reg = <0x60>;
|
||||
|
||||
buck0-in-supply =<&vsys_3v3>;
|
||||
buck1-in-supply =<&vsys_3v3>;
|
||||
ldo0-in-supply =<&evm_5v0>;
|
||||
ldo1-in-supply =<&evm_5v0>;
|
||||
|
||||
lp8733_regulators: regulators {
|
||||
lp8733_buck0_reg: buck0 {
|
||||
/* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
|
||||
regulator-name = "lp8733-buck0";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
lp8733_buck1_reg: buck1 {
|
||||
/* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
|
||||
regulator-name = "lp8733-buck1";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
lp8733_ldo0_reg: ldo0 {
|
||||
/* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
|
||||
regulator-name = "lp8733-ldo0";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
lp8733_ldo1_reg: ldo1 {
|
||||
/* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
|
||||
regulator-name = "lp8733-ldo1";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lp8732: lp8732@61 {
|
||||
compatible = "ti,lp8732";
|
||||
reg = <0x61>;
|
||||
|
||||
buck0-in-supply =<&vsys_3v3>;
|
||||
buck1-in-supply =<&vsys_3v3>;
|
||||
ldo0-in-supply =<&vsys_3v3>;
|
||||
ldo1-in-supply =<&vsys_3v3>;
|
||||
|
||||
lp8732_regulators: regulators {
|
||||
lp8732_buck0_reg: buck0 {
|
||||
/* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
|
||||
regulator-name = "lp8732-buck0";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
lp8732_buck1_reg: buck1 {
|
||||
/* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
|
||||
regulator-name = "lp8732-buck1";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
lp8732_ldo0_reg: ldo0 {
|
||||
/* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
|
||||
regulator-name = "lp8732-ldo0";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
lp8732_ldo1_reg: ldo1 {
|
||||
/* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
|
||||
regulator-name = "lp8732-ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcf_gpio_21 {
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
|
||||
&pcf_hdmi {
|
||||
p0 {
|
||||
/*
|
||||
* PM_OEn to High: Disable routing I2C3 to PM_I2C
|
||||
* With this PM_SEL(p3) should not matter
|
||||
*/
|
||||
gpio-hog;
|
||||
gpios = <0 GPIO_ACTIVE_LOW>;
|
||||
output-high;
|
||||
line-name = "pm_oe_n";
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc_aux-supply = <&vpo_sd_1v8_3v3>;
|
||||
};
|
||||
|
||||
&mac {
|
||||
mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
|
||||
<&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
|
||||
<&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
|
||||
dual_emac;
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <2>;
|
||||
phy-mode = "rgmii-id";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <3>;
|
||||
phy-mode = "rgmii-id";
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
dp83867_0: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
|
||||
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
|
||||
ti,impedance-control = <0x1f>;
|
||||
};
|
||||
|
||||
dp83867_1: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
|
||||
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
|
||||
ti,impedance-control = <0x1f>;
|
||||
};
|
||||
};
|
||||
|
||||
/* No Sata on this device */
|
||||
&sata_phy {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* No RTC on this device */
|
||||
&rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
phy-supply = <&lp8733_ldo1_reg>;
|
||||
};
|
||||
|
||||
&usb2_phy2 {
|
||||
phy-supply = <&lp8733_ldo1_reg>;
|
||||
};
|
||||
|
||||
&dss {
|
||||
/* Supplied by VDA_1V8_PLL */
|
||||
vdda_video-supply = <&lp8732_ldo0_reg>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
/* Supplied by VDA_1V8_PHY */
|
||||
vdda_video-supply = <&lp8732_ldo1_reg>;
|
||||
};
|
||||
@@ -18,11 +18,49 @@
|
||||
display0 = &hdmi0;
|
||||
};
|
||||
|
||||
evm_12v0: fixedregulator-evm12v0 {
|
||||
/* main supply */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "evm_12v0";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
evm_5v0: fixedregulator-evm5v0 {
|
||||
/* Output 1 of TPS43351QDAPRQ1 on dra72-evm */
|
||||
/* Output 1 of LM5140QRWGTQ1 on dra71-evm */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "evm_5v0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&evm_12v0>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vsys_3v3: fixedregulator-vsys3v3 {
|
||||
/* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
|
||||
/* Output 2 of LM5140QRWGTQ1 on dra71-evm */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vsys_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&evm_12v0>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
evm_3v3_sw: fixedregulator-evm_3v3 {
|
||||
/* TPS22965DSG */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "evm_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vsys_3v3>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
aic_dvdd: fixedregulator-aic_dvdd {
|
||||
@@ -39,6 +77,7 @@
|
||||
regulator-name = "evm_3v3_sd";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&evm_3v3_sw>;
|
||||
enable-active-high;
|
||||
gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
@@ -69,9 +108,6 @@
|
||||
tpd12s015: encoder {
|
||||
compatible = "ti,tpd12s015";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tpd12s015_pins>;
|
||||
|
||||
gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>, /* P4, CT CP HPD */
|
||||
<&pcf_hdmi 5 GPIO_ACTIVE_HIGH>, /* P5, LS OE */
|
||||
<&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
|
||||
@@ -134,72 +170,6 @@
|
||||
};
|
||||
|
||||
&dra7_pmx_core {
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
|
||||
DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c5_pins: pinmux_i2c5_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
|
||||
DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c5_pins: pinmux_i2c5_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
|
||||
DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
nand_default: nand_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
|
||||
DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
|
||||
DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
|
||||
DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
|
||||
DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
|
||||
DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
|
||||
DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
|
||||
DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
|
||||
DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
|
||||
DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
|
||||
DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
|
||||
DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
|
||||
DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
|
||||
DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
|
||||
DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
|
||||
DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
|
||||
DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
|
||||
DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
|
||||
DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
|
||||
DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
|
||||
DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
|
||||
DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: pinmux_usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
usb2_pins: pinmux_usb2_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
tps65917_pins_default: tps65917_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
|
||||
@@ -240,161 +210,12 @@
|
||||
DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
|
||||
>;
|
||||
};
|
||||
|
||||
hdmi_pins: pinmux_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
|
||||
DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
|
||||
>;
|
||||
};
|
||||
|
||||
atl_pins: pinmux_atl_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */
|
||||
DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_pins: pinmux_mcasp3_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps65917: tps65917@58 {
|
||||
compatible = "ti,tps65917";
|
||||
reg = <0x58>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tps65917_pins_default>;
|
||||
|
||||
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
ti,system-power-controller;
|
||||
|
||||
tps65917_pmic {
|
||||
compatible = "ti,tps65917-pmic";
|
||||
|
||||
tps65917_regulators: regulators {
|
||||
smps1_reg: smps1 {
|
||||
/* VDD_MPU */
|
||||
regulator-name = "smps1";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps2_reg: smps2 {
|
||||
/* VDD_CORE */
|
||||
regulator-name = "smps2";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
smps3_reg: smps3 {
|
||||
/* VDD_GPU IVA DSPEVE */
|
||||
regulator-name = "smps3";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
smps4_reg: smps4 {
|
||||
/* VDDS1V8 */
|
||||
regulator-name = "smps4";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
smps5_reg: smps5 {
|
||||
/* VDD_DDR */
|
||||
regulator-name = "smps5";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
/* LDO1_OUT --> SDIO */
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-allow-bypass;
|
||||
};
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
/* VDDA_1V8_PHY */
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo5_reg: ldo5 {
|
||||
/* VDDA_1V8_PLL */
|
||||
regulator-name = "ldo5";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
/* VDDA_3V_USB: VDDA_USBHS33 */
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tps65917_power_button {
|
||||
compatible = "ti,palmas-pwrbutton";
|
||||
interrupt-parent = <&tps65917>;
|
||||
interrupts = <1 IRQ_TYPE_NONE>;
|
||||
wakeup-source;
|
||||
ti,palmas-long-press-seconds = <6>;
|
||||
};
|
||||
};
|
||||
|
||||
pcf_gpio_21: gpio@21 {
|
||||
compatible = "ti,pcf8575", "nxp,pcf8575";
|
||||
reg = <0x21>;
|
||||
@@ -423,8 +244,6 @@
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c5_pins>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
pcf_hdmi: pcf8575@26 {
|
||||
@@ -462,8 +281,6 @@
|
||||
|
||||
&gpmc {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nand_default>;
|
||||
ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
|
||||
nand@0,0 {
|
||||
/* To use NAND, DIP switch SW5 must be set like so:
|
||||
@@ -548,14 +365,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
phy-supply = <&ldo4_reg>;
|
||||
};
|
||||
|
||||
&usb2_phy2 {
|
||||
phy-supply = <&ldo4_reg>;
|
||||
};
|
||||
|
||||
&omap_dwc3_1 {
|
||||
extcon = <&extcon_usb1>;
|
||||
};
|
||||
@@ -566,14 +375,10 @@
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "peripheral";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
dr_mode = "host";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb2_pins>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
@@ -581,7 +386,6 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
vmmc-supply = <&evm_3v3_sd>;
|
||||
vmmc_aux-supply = <&ldo1_reg>;
|
||||
bus-width = <4>;
|
||||
/*
|
||||
* SDCD signal is not being used here - using the fact that GPIO mode
|
||||
@@ -603,71 +407,8 @@
|
||||
max-frequency = <192000000>;
|
||||
};
|
||||
|
||||
&dra7_pmx_core {
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 2 */
|
||||
DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
|
||||
DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
|
||||
DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
|
||||
DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
|
||||
DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
|
||||
DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
|
||||
DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
|
||||
DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
|
||||
DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
|
||||
DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
|
||||
DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
|
||||
DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
|
||||
>;
|
||||
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 2 */
|
||||
DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */
|
||||
DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15)
|
||||
DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
pinctrl-1 = <&cpsw_sleep>;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||
};
|
||||
|
||||
&dcan1 {
|
||||
@@ -741,16 +482,11 @@
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
|
||||
vdda_video-supply = <&ldo5_reg>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "ok";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_pins>;
|
||||
|
||||
port {
|
||||
hdmi_out: endpoint {
|
||||
remote-endpoint = <&tpd12s015_in>;
|
||||
@@ -759,9 +495,6 @@
|
||||
};
|
||||
|
||||
&atl {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&atl_pins>;
|
||||
|
||||
assigned-clocks = <&abe_dpll_sys_clk_mux>,
|
||||
<&atl_gfclk_mux>,
|
||||
<&dpll_abe_ck>,
|
||||
@@ -780,9 +513,6 @@
|
||||
|
||||
&mcasp3 {
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mcasp3_pins>;
|
||||
pinctrl-1 = <&mcasp3_sleep_pins>;
|
||||
|
||||
assigned-clocks = <&mcasp3_ahclkx_mux>;
|
||||
assigned-clock-parents = <&atl_clkin2_ck>;
|
||||
|
||||
@@ -17,17 +17,22 @@
|
||||
};
|
||||
};
|
||||
|
||||
&tps65917_regulators {
|
||||
ldo2_reg: ldo2 {
|
||||
/* LDO2_OUT --> VDDA_1V8_PHY2 */
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
&i2c1 {
|
||||
tps65917: tps65917@58 {
|
||||
reg = <0x58>;
|
||||
|
||||
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
|
||||
};
|
||||
};
|
||||
|
||||
#include "dra72-evm-tps65917.dtsi"
|
||||
|
||||
&ldo2_reg {
|
||||
/* LDO2_OUT --> VDDA_1V8_PHY2 */
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
vdda-supply = <&ldo2_reg>;
|
||||
};
|
||||
|
||||
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