ath9k_hw: abstract loading noisefloor
This is the last call on calib.c which acceses PHY stuff, with this change we calib.c is now generic between both all supported hardware families. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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committed by
John W. Linville

parent
400b738678
commit
77d6d39a77
@@ -16,7 +16,6 @@
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#include "hw.h"
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#include "hw-ops.h"
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#include "ar9002_phy.h"
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/* Common calibration code */
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@@ -174,72 +173,6 @@ void ath9k_hw_start_nfcal(struct ath_hw *ah)
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REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
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}
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void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
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{
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struct ath9k_nfcal_hist *h;
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int i, j;
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int32_t val;
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const u32 ar5416_cca_regs[6] = {
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AR_PHY_CCA,
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AR_PHY_CH1_CCA,
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AR_PHY_CH2_CCA,
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AR_PHY_EXT_CCA,
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AR_PHY_CH1_EXT_CCA,
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AR_PHY_CH2_EXT_CCA
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};
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u8 chainmask, rx_chain_status;
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rx_chain_status = REG_READ(ah, AR_PHY_RX_CHAINMASK);
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if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
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chainmask = 0x9;
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else if (AR_SREV_9280(ah) || AR_SREV_9287(ah)) {
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if ((rx_chain_status & 0x2) || (rx_chain_status & 0x4))
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chainmask = 0x1B;
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else
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chainmask = 0x09;
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} else {
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if (rx_chain_status & 0x4)
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chainmask = 0x3F;
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else if (rx_chain_status & 0x2)
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chainmask = 0x1B;
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else
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chainmask = 0x09;
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}
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h = ah->nfCalHist;
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for (i = 0; i < NUM_NF_READINGS; i++) {
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if (chainmask & (1 << i)) {
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val = REG_READ(ah, ar5416_cca_regs[i]);
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val &= 0xFFFFFE00;
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val |= (((u32) (h[i].privNF) << 1) & 0x1ff);
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REG_WRITE(ah, ar5416_cca_regs[i], val);
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}
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}
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REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
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AR_PHY_AGC_CONTROL_ENABLE_NF);
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REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
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AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
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REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
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for (j = 0; j < 5; j++) {
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if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
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AR_PHY_AGC_CONTROL_NF) == 0)
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break;
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udelay(50);
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}
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for (i = 0; i < NUM_NF_READINGS; i++) {
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if (chainmask & (1 << i)) {
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val = REG_READ(ah, ar5416_cca_regs[i]);
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val &= 0xFFFFFE00;
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val |= (((u32) (-50) << 1) & 0x1ff);
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REG_WRITE(ah, ar5416_cca_regs[i], val);
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}
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}
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}
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int16_t ath9k_hw_getnf(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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