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MIPS: Netlogic: Support for multi-chip configuration

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Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a
coherent multi-node system.  Each SoC has its own set of on-chip
devices including PIC.  To support this, add a per SoC stucture and
use it for the PIC and SYS block addresses instead of using global
variables.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4469
Signed-off-by: John Crispin <blogic@openwrt.org>
This commit is contained in:
Jayachandran C
2012-10-31 12:01:39 +00:00
committed by John Crispin
parent 2a37b1ae44
commit 77ae798f5b
12 changed files with 176 additions and 86 deletions
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17
arch/mips/netlogic/xlp/setup.c
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@@ -52,17 +52,17 @@
#include <asm/netlogic/xlp-hal/xlp.h>
#include <asm/netlogic/xlp-hal/sys.h>
unsigned long nlm_common_ebase = 0x0;
/* default to uniprocessor */
uint32_t nlm_coremask = 1;
uint64_t nlm_io_base;
struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
cpumask_t nlm_cpumask = CPU_MASK_CPU0;
int nlm_threads_per_core = 1;
unsigned int nlm_threads_per_core;
extern u32 __dtb_start[];
static void nlm_linux_exit(void)
{
nlm_write_sys_reg(nlm_sys_base, SYS_CHIP_RESET, 1);
uint64_t sysbase = nlm_get_node(0)->sysbase;
nlm_write_sys_reg(sysbase, SYS_CHIP_RESET, 1);
for ( ; ; )
cpu_wait();
}
@@ -110,10 +110,9 @@ void xlp_mmu_init(void)
void __init prom_init(void)
{
nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
xlp_mmu_init();
nlm_hal_init();
nlm_common_ebase = read_c0_ebase() & (~((1 << 12) - 1));
nlm_node_init(0);
#ifdef CONFIG_SMP
cpumask_setall(&nlm_cpumask);