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Merge tag 'mips_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Procházet zdrojové kódy 
Pull MIPS updates from James Hogan:
 "These are the main MIPS changes for 4.18.

  Rough overview:

   - MAINTAINERS: Add Paul Burton as MIPS co-maintainer

   - Misc: Generic compiler intrinsics, Y2038 improvements, Perf+MT fixes

   - Platform support: Netgear WNR1000 V3, Microsemi Ocelot integrated
     switch, Ingenic watchdog cleanups

  More detailed  summary:

  Maintainers:

   - Add Paul Burton as MIPS co-maintainer, as I soon won't have access
     to much MIPS hardware, nor enough time to properly maintain MIPS on
     my own.

  Miscellaneous:

   - Use generic GCC library routines from lib/
     - Add notrace to generic ucmpdi2 implementation
     - Rename compiler intrinsic selects to GENERIC_LIB_*
     - vmlinuz: Use generic ashldi3

   - y2038: Convert update/read_persistent_clock() to *_clock64()
     - sni: Remove read_persistent_clock()

   - perf: Fix perf with MT counting other threads
     - Probe for per-TC perf counters in cpu-probe.c
     - Use correct VPE ID for VPE tracing

  Minor cleanups:

   - Avoid unneeded built-in.a in DTS dirs

   - sc-debugfs: Re-use kstrtobool_from_user

   - memset.S: Reinstate delay slot indentation

   - VPE: Fix spelling "uneeded" -> "Unneeded"

  Platform support:

  BCM47xx:

   - Add support for Netgear WNR1000 V3

   - firmware: Support small NVRAM partitions

   - Use __initdata for LEDs platform data

  Ingenic:

   - Watchdog driver & platform code improvements:
     - Disable clock after stopping counter
     - Use devm_* functions
     - Drop module remove function
     - Move platform reset code to restart handler in driver
     - JZ4740: Convert watchdog instantiation to DT
     - JZ4780: Fix watchdog DT node
     - qi_lb60_defconfig: Enable watchdog driver

  Microsemi:

   - Ocelot: Add support for integrated switch
     - pcb123: Connect phys to ports"

* tag 'mips_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits)
  MAINTAINERS: Add Paul Burton as MIPS co-maintainer
  MIPS: ptrace: Make FPU context layout comments match reality
  MIPS: memset.S: Reinstate delay slot indentation
  MIPS: perf: Fix perf with MT counting other threads
  MIPS: perf: Use correct VPE ID when setting up VPE tracing
  MIPS: perf: More robustly probe for the presence of per-tc counters
  MIPS: Probe for MIPS MT perf counters per TC
  MIPS: mscc: Connect phys to ports on ocelot_pcb123
  MIPS: mscc: Add switch to ocelot
  MIPS: JZ4740: Drop old platform reset code
  MIPS: qi_lb60: Enable the jz4740-wdt driver
  MIPS: JZ4780: dts: Fix watchdog node
  MIPS: JZ4740: dts: Add bindings for the jz4740-wdt driver
  watchdog: JZ4740: Drop module remove function
  watchdog: JZ4740: Register a restart handler
  watchdog: JZ4740: Use devm_* functions
  watchdog: JZ4740: Disable clock after stopping counter
  MIPS: VPE: Fix spelling mistake: "uneeded" -> "unneeded"
  MIPS: Re-use kstrtobool_from_user()
  MIPS: Convert update_persistent_clock() to update_persistent_clock64()
  ...
Tento commit je obsažen v:
Linus Torvalds
2018-06-12 12:56:02 -07:00
rodič ea8781e5e7 9ed8b56b80
revize 763f96944c
60 změnil soubory, kde provedl 339 přidání a 392 odebrání
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12
arch/mips/kernel/cpu-probe.c
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@@ -414,6 +414,14 @@ static int __init ftlb_disable(char *s)
__setup("noftlb", ftlb_disable);
/*
* Check if the CPU has per tc perf counters
*/
static inline void cpu_set_mt_per_tc_perf(struct cpuinfo_mips *c)
{
if (read_c0_config7() & MTI_CONF7_PTC)
c->options |= MIPS_CPU_MT_PER_TC_PERF_COUNTERS;
}
static inline void check_errata(void)
{
@@ -1572,6 +1580,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
c->cputype = CPU_34K;
c->writecombine = _CACHE_UNCACHED;
__cpu_name[cpu] = "MIPS 34Kc";
cpu_set_mt_per_tc_perf(c);
break;
case PRID_IMP_74K:
c->cputype = CPU_74K;
@@ -1592,6 +1601,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
c->cputype = CPU_1004K;
c->writecombine = _CACHE_UNCACHED;
__cpu_name[cpu] = "MIPS 1004Kc";
cpu_set_mt_per_tc_perf(c);
break;
case PRID_IMP_1074K:
c->cputype = CPU_1074K;
@@ -1601,10 +1611,12 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
case PRID_IMP_INTERAPTIV_UP:
c->cputype = CPU_INTERAPTIV;
__cpu_name[cpu] = "MIPS interAptiv";
cpu_set_mt_per_tc_perf(c);
break;
case PRID_IMP_INTERAPTIV_MP:
c->cputype = CPU_INTERAPTIV;
__cpu_name[cpu] = "MIPS interAptiv (multi)";
cpu_set_mt_per_tc_perf(c);
break;
case PRID_IMP_PROAPTIV_UP:
c->cputype = CPU_PROAPTIV;

91
arch/mips/kernel/perf_event_mipsxx.c
Zobrazit soubor

@@ -129,20 +129,14 @@ static struct mips_pmu mipspmu;
#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
static int cpu_has_mipsmt_pertccounters;
static DEFINE_RWLOCK(pmuint_rwlock);
#if defined(CONFIG_CPU_BMIPS5000)
#define vpe_id() (cpu_has_mipsmt_pertccounters ? \
0 : (smp_processor_id() & MIPS_CPUID_TO_COUNTER_MASK))
#else
/*
* FIXME: For VSMP, vpe_id() is redefined for Perf-events, because
* cpu_data[cpuid].vpe_id reports 0 for _both_ CPUs.
*/
#define vpe_id() (cpu_has_mipsmt_pertccounters ? \
0 : smp_processor_id())
0 : cpu_vpe_id(&current_cpu_data))
#endif
/* Copied from op_model_mipsxx.c */
@@ -329,7 +323,11 @@ static int mipsxx_pmu_alloc_counter(struct cpu_hw_events *cpuc,
static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx)
{
struct perf_event *event = container_of(evt, struct perf_event, hw);
struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
#ifdef CONFIG_MIPS_MT_SMP
unsigned int range = evt->event_base >> 24;
#endif /* CONFIG_MIPS_MT_SMP */
WARN_ON(idx < 0 || idx >= mipspmu.num_counters);
@@ -337,11 +335,37 @@ static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx)
(evt->config_base & M_PERFCTL_CONFIG_MASK) |
/* Make sure interrupt enabled. */
MIPS_PERFCTRL_IE;
if (IS_ENABLED(CONFIG_CPU_BMIPS5000))
#ifdef CONFIG_CPU_BMIPS5000
{
/* enable the counter for the calling thread */
cpuc->saved_ctrl[idx] |=
(1 << (12 + vpe_id())) | BRCM_PERFCTRL_TC;
}
#else
#ifdef CONFIG_MIPS_MT_SMP
if (range > V) {
/* The counter is processor wide. Set it up to count all TCs. */
pr_debug("Enabling perf counter for all TCs\n");
cpuc->saved_ctrl[idx] |= M_TC_EN_ALL;
} else
#endif /* CONFIG_MIPS_MT_SMP */
{
unsigned int cpu, ctrl;
/*
* Set up the counter for a particular CPU when event->cpu is
* a valid CPU number. Otherwise set up the counter for the CPU
* scheduling this thread.
*/
cpu = (event->cpu >= 0) ? event->cpu : smp_processor_id();
ctrl = M_PERFCTL_VPEID(cpu_vpe_id(&cpu_data[cpu]));
ctrl |= M_TC_EN_VPE;
cpuc->saved_ctrl[idx] |= ctrl;
pr_debug("Enabling perf counter for CPU%d\n", cpu);
}
#endif /* CONFIG_CPU_BMIPS5000 */
/*
* We do not actually let the counter run. Leave it until start().
*/
@@ -655,13 +679,14 @@ static unsigned int mipspmu_perf_event_encode(const struct mips_perf_event *pev)
* event_id.
*/
#ifdef CONFIG_MIPS_MT_SMP
return ((unsigned int)pev->range << 24) |
(pev->cntr_mask & 0xffff00) |
(pev->event_id & 0xff);
#else
return (pev->cntr_mask & 0xffff00) |
(pev->event_id & 0xff);
#endif
if (num_possible_cpus() > 1)
return ((unsigned int)pev->range << 24) |
(pev->cntr_mask & 0xffff00) |
(pev->event_id & 0xff);
else
#endif /* CONFIG_MIPS_MT_SMP */
return ((pev->cntr_mask & 0xffff00) |
(pev->event_id & 0xff));
}
static const struct mips_perf_event *mipspmu_map_general_event(int idx)
@@ -1265,37 +1290,6 @@ static const struct mips_perf_event xlp_cache_map
},
};
#ifdef CONFIG_MIPS_MT_SMP
static void check_and_calc_range(struct perf_event *event,
const struct mips_perf_event *pev)
{
struct hw_perf_event *hwc = &event->hw;
if (event->cpu >= 0) {
if (pev->range > V) {
/*
* The user selected an event that is processor
* wide, while expecting it to be VPE wide.
*/
hwc->config_base |= M_TC_EN_ALL;
} else {
/*
* FIXME: cpu_data[event->cpu].vpe_id reports 0
* for both CPUs.
*/
hwc->config_base |= M_PERFCTL_VPEID(event->cpu);
hwc->config_base |= M_TC_EN_VPE;
}
} else
hwc->config_base |= M_TC_EN_ALL;
}
#else
static void check_and_calc_range(struct perf_event *event,
const struct mips_perf_event *pev)
{
}
#endif
static int __hw_perf_event_init(struct perf_event *event)
{
struct perf_event_attr *attr = &event->attr;
@@ -1331,10 +1325,6 @@ static int __hw_perf_event_init(struct perf_event *event)
*/
hwc->config_base = MIPS_PERFCTRL_IE;
/* Calculate range bits and validate it. */
if (num_possible_cpus() > 1)
check_and_calc_range(event, pev);
hwc->event_base = mipspmu_perf_event_encode(pev);
if (PERF_TYPE_RAW == event->attr.type)
mutex_unlock(&raw_event_mutex);
@@ -1723,7 +1713,6 @@ init_hw_perf_events(void)
}
#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
cpu_has_mipsmt_pertccounters = read_c0_config7() & (1<<19);
if (!cpu_has_mipsmt_pertccounters)
counters = counters_total_to_per_cpu(counters);
#endif

4
arch/mips/kernel/ptrace.c
Zobrazit soubor

@@ -811,7 +811,7 @@ long arch_ptrace(struct task_struct *child, long request,
/*
* The odd registers are actually the high
* order bits of the values stored in the even
* registers - unless we're using r2k_switch.S.
* registers.
*/
tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
addr & 1);
@@ -906,7 +906,7 @@ long arch_ptrace(struct task_struct *child, long request,
/*
* The odd registers are actually the high
* order bits of the values stored in the even
* registers - unless we're using r2k_switch.S.
* registers.
*/
set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
addr & 1, data);

4
arch/mips/kernel/ptrace32.c
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@@ -103,7 +103,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
/*
* The odd registers are actually the high
* order bits of the values stored in the even
* registers - unless we're using r2k_switch.S.
* registers.
*/
tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
addr & 1);
@@ -216,7 +216,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
/*
* The odd registers are actually the high
* order bits of the values stored in the even
* registers - unless we're using r2k_switch.S.
* registers.
*/
set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
addr & 1, data);

15
arch/mips/kernel/time.c
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@@ -34,21 +34,6 @@
DEFINE_SPINLOCK(rtc_lock);
EXPORT_SYMBOL(rtc_lock);
int __weak rtc_mips_set_time(unsigned long sec)
{
return -ENODEV;
}
int __weak rtc_mips_set_mmss(unsigned long nowtime)
{
return rtc_mips_set_time(nowtime);
}
int update_persistent_clock(struct timespec now)
{
return rtc_mips_set_mmss(now.tv_sec);
}
static int null_perf_irq(void)
{
return 0;

2
arch/mips/kernel/vpe.c
Zobrazit soubor

@@ -872,7 +872,7 @@ static ssize_t vpe_write(struct file *file, const char __user *buffer,
return -ENODEV;
if ((count + v->len) > v->plen) {
pr_warn("VPE loader: elf size too big. Perhaps strip uneeded symbols\n");
pr_warn("VPE loader: elf size too big. Perhaps strip unneeded symbols\n");
return -ENOMEM;
}