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ARM: OMAP2+: Drop sdma interrupt handling for mach-omap2

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All device tree probing omap SoCs only have device drivers that are using
Linux dmaengine API with the IRQENABLE_L1 interrupts. Only omap1 is still
using old legacy dma.

This means we can remove the legacy sdma interrupt handling for
IRQENABLE_L0, and only rely on the dmaengine driver using IRQENABLE_L1.

The legacy code still allocates the channels, but that will be deal with
in the following patches.

Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Vinod Koul <vkoul@kernel.org>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren
2019-12-16 14:41:53 -08:00
parent 28b5afcd06
commit 755cbfd8cf
3 changed files with 8 additions and 244 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
include/linux/omap-dma.h
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@@ -129,7 +129,6 @@
#define IS_WORD_16 BIT(0xd)
#define ENABLE_16XX_MODE BIT(0xe)
#define HS_CHANNELS_RESERVED BIT(0xf)
#define DMA_ENGINE_HANDLE_IRQ BIT(0x10)
/* Defines for DMA Capabilities */
#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
@@ -239,9 +238,6 @@ struct omap_dma_lch {
void (*callback)(int lch, u16 ch_status, void *data);
void *data;
long flags;
/* required for Dynamic chaining */
int prev_linked_ch;
int next_linked_ch;
int state;
int chain_id;
int status;