Merge branch 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull MCE changes from Ingo Molnar. * 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mce: Fix return value of mce_chrdev_read() when erst is disabled x86/mce: Convert static array of pointers to per-cpu variables x86/mce: Replace hard coded hex constants with symbolic defines x86/mce: Recognise machine check bank signature for data path error x86/mce: Handle "action required" errors x86/mce: Add mechanism to safely save information in MCE handler x86/mce: Create helper function to save addr/misc when needed HWPOISON: Add code to handle "action required" errors. HWPOISON: Clean up memory_failure() vs. __memory_failure()
This commit is contained in:
@@ -151,7 +151,7 @@ static inline void enable_p5_mce(void) {}
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void mce_setup(struct mce *m);
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void mce_log(struct mce *m);
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extern struct device *mce_device[CONFIG_NR_CPUS];
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DECLARE_PER_CPU(struct device *, mce_device);
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/*
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* Maximum banks number.
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@@ -54,7 +54,14 @@ static struct severity {
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#define MASK(x, y) .mask = x, .result = y
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#define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S)
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#define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR)
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#define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
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#define MCACOD 0xffff
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/* Architecturally defined codes from SDM Vol. 3B Chapter 15 */
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#define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */
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#define MCACOD_SCRUBMSK 0xfff0
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#define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */
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#define MCACOD_DATA 0x0134 /* Data Load */
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#define MCACOD_INSTR 0x0150 /* Instruction Fetch */
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MCESEV(
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NO, "Invalid",
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@@ -102,11 +109,24 @@ static struct severity {
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SER, BITCLR(MCI_STATUS_S)
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),
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/* AR add known MCACODs here */
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MCESEV(
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PANIC, "Action required with lost events",
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SER, BITSET(MCI_STATUS_OVER|MCI_UC_SAR)
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),
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/* known AR MCACODs: */
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#ifdef CONFIG_MEMORY_FAILURE
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MCESEV(
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KEEP, "HT thread notices Action required: data load error",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
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MCGMASK(MCG_STATUS_EIPV, 0)
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),
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MCESEV(
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AR, "Action required: data load error",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
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USER
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),
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#endif
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MCESEV(
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PANIC, "Action required: unknown MCACOD",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_SAR)
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@@ -115,11 +135,11 @@ static struct severity {
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/* known AO MCACODs: */
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MCESEV(
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AO, "Action optional: memory scrubbing error",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|0xfff0, MCI_UC_S|0x00c0)
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD_SCRUBMSK, MCI_UC_S|MCACOD_SCRUB)
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),
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MCESEV(
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AO, "Action optional: last level cache writeback error",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_S|0x017a)
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_S|MCACOD_L3WB)
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),
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MCESEV(
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SOME, "Action optional: unknown MCACOD",
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@@ -540,6 +540,27 @@ static void mce_report_event(struct pt_regs *regs)
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irq_work_queue(&__get_cpu_var(mce_irq_work));
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}
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/*
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* Read ADDR and MISC registers.
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*/
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static void mce_read_aux(struct mce *m, int i)
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{
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if (m->status & MCI_STATUS_MISCV)
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m->misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
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if (m->status & MCI_STATUS_ADDRV) {
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m->addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
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/*
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* Mask the reported address by the reported granularity.
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*/
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if (mce_ser && (m->status & MCI_STATUS_MISCV)) {
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u8 shift = MCI_MISC_ADDR_LSB(m->misc);
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m->addr >>= shift;
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m->addr <<= shift;
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}
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}
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}
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DEFINE_PER_CPU(unsigned, mce_poll_count);
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/*
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@@ -590,10 +611,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
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(m.status & (mce_ser ? MCI_STATUS_S : MCI_STATUS_UC)))
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continue;
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if (m.status & MCI_STATUS_MISCV)
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m.misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
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if (m.status & MCI_STATUS_ADDRV)
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m.addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
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mce_read_aux(&m, i);
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if (!(flags & MCP_TIMESTAMP))
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m.tsc = 0;
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@@ -916,6 +934,49 @@ static void mce_clear_state(unsigned long *toclear)
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}
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}
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/*
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* Need to save faulting physical address associated with a process
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* in the machine check handler some place where we can grab it back
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* later in mce_notify_process()
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*/
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#define MCE_INFO_MAX 16
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struct mce_info {
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atomic_t inuse;
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struct task_struct *t;
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__u64 paddr;
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} mce_info[MCE_INFO_MAX];
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static void mce_save_info(__u64 addr)
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{
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struct mce_info *mi;
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for (mi = mce_info; mi < &mce_info[MCE_INFO_MAX]; mi++) {
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if (atomic_cmpxchg(&mi->inuse, 0, 1) == 0) {
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mi->t = current;
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mi->paddr = addr;
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return;
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}
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}
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mce_panic("Too many concurrent recoverable errors", NULL, NULL);
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}
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static struct mce_info *mce_find_info(void)
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{
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struct mce_info *mi;
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for (mi = mce_info; mi < &mce_info[MCE_INFO_MAX]; mi++)
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if (atomic_read(&mi->inuse) && mi->t == current)
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return mi;
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return NULL;
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}
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static void mce_clear_info(struct mce_info *mi)
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{
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atomic_set(&mi->inuse, 0);
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}
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/*
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* The actual machine check handler. This only handles real
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* exceptions when something got corrupted coming in through int 18.
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@@ -969,7 +1030,9 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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barrier();
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/*
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* When no restart IP must always kill or panic.
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* When no restart IP might need to kill or panic.
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* Assume the worst for now, but if we find the
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* severity is MCE_AR_SEVERITY we have other options.
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*/
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if (!(m.mcgstatus & MCG_STATUS_RIPV))
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kill_it = 1;
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@@ -1023,16 +1086,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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continue;
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}
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/*
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* Kill on action required.
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*/
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if (severity == MCE_AR_SEVERITY)
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kill_it = 1;
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if (m.status & MCI_STATUS_MISCV)
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m.misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
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if (m.status & MCI_STATUS_ADDRV)
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m.addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
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mce_read_aux(&m, i);
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/*
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* Action optional error. Queue address for later processing.
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@@ -1052,6 +1106,9 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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}
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}
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/* mce_clear_state will clear *final, save locally for use later */
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m = *final;
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if (!no_way_out)
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mce_clear_state(toclear);
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@@ -1063,27 +1120,22 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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no_way_out = worst >= MCE_PANIC_SEVERITY;
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/*
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* If we have decided that we just CAN'T continue, and the user
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* has not set tolerant to an insane level, give up and die.
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*
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* This is mainly used in the case when the system doesn't
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* support MCE broadcasting or it has been disabled.
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* At insane "tolerant" levels we take no action. Otherwise
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* we only die if we have no other choice. For less serious
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* issues we try to recover, or limit damage to the current
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* process.
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*/
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if (no_way_out && tolerant < 3)
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mce_panic("Fatal machine check on current CPU", final, msg);
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/*
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* If the error seems to be unrecoverable, something should be
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* done. Try to kill as little as possible. If we can kill just
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* one task, do that. If the user has set the tolerance very
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* high, don't try to do anything at all.
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*/
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if (kill_it && tolerant < 3)
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force_sig(SIGBUS, current);
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/* notify userspace ASAP */
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set_thread_flag(TIF_MCE_NOTIFY);
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if (tolerant < 3) {
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if (no_way_out)
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mce_panic("Fatal machine check on current CPU", &m, msg);
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if (worst == MCE_AR_SEVERITY) {
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/* schedule action before return to userland */
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mce_save_info(m.addr);
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set_thread_flag(TIF_MCE_NOTIFY);
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} else if (kill_it) {
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force_sig(SIGBUS, current);
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}
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}
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if (worst > 0)
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mce_report_event(regs);
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@@ -1094,34 +1146,57 @@ out:
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}
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EXPORT_SYMBOL_GPL(do_machine_check);
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/* dummy to break dependency. actual code is in mm/memory-failure.c */
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void __attribute__((weak)) memory_failure(unsigned long pfn, int vector)
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#ifndef CONFIG_MEMORY_FAILURE
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int memory_failure(unsigned long pfn, int vector, int flags)
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{
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printk(KERN_ERR "Action optional memory failure at %lx ignored\n", pfn);
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/* mce_severity() should not hand us an ACTION_REQUIRED error */
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BUG_ON(flags & MF_ACTION_REQUIRED);
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printk(KERN_ERR "Uncorrected memory error in page 0x%lx ignored\n"
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"Rebuild kernel with CONFIG_MEMORY_FAILURE=y for smarter handling\n", pfn);
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return 0;
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}
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#endif
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/*
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* Called after mce notification in process context. This code
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* is allowed to sleep. Call the high level VM handler to process
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* any corrupted pages.
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* Assume that the work queue code only calls this one at a time
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* per CPU.
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* Note we don't disable preemption, so this code might run on the wrong
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* CPU. In this case the event is picked up by the scheduled work queue.
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* This is merely a fast path to expedite processing in some common
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* cases.
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* Called in process context that interrupted by MCE and marked with
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* TIF_MCE_NOTIFY, just before returning to erroneous userland.
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* This code is allowed to sleep.
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* Attempt possible recovery such as calling the high level VM handler to
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* process any corrupted pages, and kill/signal current process if required.
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* Action required errors are handled here.
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*/
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void mce_notify_process(void)
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{
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unsigned long pfn;
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mce_notify_irq();
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while (mce_ring_get(&pfn))
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memory_failure(pfn, MCE_VECTOR);
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struct mce_info *mi = mce_find_info();
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if (!mi)
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mce_panic("Lost physical address for unconsumed uncorrectable error", NULL, NULL);
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pfn = mi->paddr >> PAGE_SHIFT;
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clear_thread_flag(TIF_MCE_NOTIFY);
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pr_err("Uncorrected hardware memory error in user-access at %llx",
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mi->paddr);
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if (memory_failure(pfn, MCE_VECTOR, MF_ACTION_REQUIRED) < 0) {
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pr_err("Memory error not recovered");
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force_sig(SIGBUS, current);
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}
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mce_clear_info(mi);
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}
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/*
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* Action optional processing happens here (picking up
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* from the list of faulting pages that do_machine_check()
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* placed into the "ring").
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*/
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static void mce_process_work(struct work_struct *dummy)
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{
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mce_notify_process();
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unsigned long pfn;
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while (mce_ring_get(&pfn))
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memory_failure(pfn, MCE_VECTOR, 0);
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}
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#ifdef CONFIG_X86_MCE_INTEL
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@@ -1211,8 +1286,6 @@ int mce_notify_irq(void)
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/* Not more than two messages every minute */
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static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2);
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clear_thread_flag(TIF_MCE_NOTIFY);
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if (test_and_clear_bit(0, &mce_need_notify)) {
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/* wake processes polling /dev/mcelog */
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wake_up_interruptible(&mce_chrdev_wait);
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@@ -1541,6 +1614,12 @@ static int __mce_read_apei(char __user **ubuf, size_t usize)
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/* Error or no more MCE record */
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if (rc <= 0) {
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mce_apei_read_done = 1;
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/*
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* When ERST is disabled, mce_chrdev_read() should return
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* "no record" instead of "no device."
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*/
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if (rc == -ENODEV)
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return 0;
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return rc;
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}
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rc = -EFAULT;
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@@ -1859,7 +1938,7 @@ static struct bus_type mce_subsys = {
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.dev_name = "machinecheck",
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};
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struct device *mce_device[CONFIG_NR_CPUS];
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DEFINE_PER_CPU(struct device *, mce_device);
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__cpuinitdata
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void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
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@@ -2038,7 +2117,7 @@ static __cpuinit int mce_device_create(unsigned int cpu)
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goto error2;
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}
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cpumask_set_cpu(cpu, mce_device_initialized);
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mce_device[cpu] = dev;
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per_cpu(mce_device, cpu) = dev;
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return 0;
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error2:
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@@ -2055,7 +2134,7 @@ error:
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static __cpuinit void mce_device_remove(unsigned int cpu)
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{
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struct device *dev = mce_device[cpu];
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struct device *dev = per_cpu(mce_device, cpu);
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int i;
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if (!cpumask_test_cpu(cpu, mce_device_initialized))
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@@ -2069,7 +2148,7 @@ static __cpuinit void mce_device_remove(unsigned int cpu)
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device_unregister(dev);
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cpumask_clear_cpu(cpu, mce_device_initialized);
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mce_device[cpu] = NULL;
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per_cpu(mce_device, cpu) = NULL;
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}
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/* Make sure there are no machine checks on offlined CPUs. */
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@@ -523,7 +523,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
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{
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int i, err = 0;
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struct threshold_bank *b = NULL;
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struct device *dev = mce_device[cpu];
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struct device *dev = per_cpu(mce_device, cpu);
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char name[32];
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sprintf(name, "threshold_bank%i", bank);
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@@ -587,7 +587,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
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if (i == cpu)
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continue;
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dev = mce_device[i];
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dev = per_cpu(mce_device, i);
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if (dev)
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err = sysfs_create_link(&dev->kobj,b->kobj, name);
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if (err)
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@@ -667,7 +667,8 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
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#ifdef CONFIG_SMP
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/* sibling symlink */
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if (shared_bank[bank] && b->blocks->cpu != cpu) {
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sysfs_remove_link(&mce_device[cpu]->kobj, name);
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dev = per_cpu(mce_device, cpu);
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sysfs_remove_link(&dev->kobj, name);
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per_cpu(threshold_banks, cpu)[bank] = NULL;
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return;
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@@ -679,7 +680,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
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if (i == cpu)
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continue;
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dev = mce_device[i];
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dev = per_cpu(mce_device, i);
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if (dev)
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sysfs_remove_link(&dev->kobj, name);
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per_cpu(threshold_banks, i)[bank] = NULL;
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