Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner: "A collection of assorted fixes: - Fix for the pinned cr0/4 fallout which escaped all testing efforts because the kvm-intel module was never loaded when the kernel was compiled with CONFIG_PARAVIRT=n. The cr0/4 accessors are moved out of line and static key is now solely used in the core code and therefore can stay in the RO after init section. So the kvm-intel and other modules do not longer reference the (read only) static key which the module loader tried to update. - Prevent an infinite loop in arch_stack_walk_user() by breaking out of the loop once the return address is detected to be 0. - Prevent the int3_emulate_call() selftest from corrupting the stack when KASAN is enabled. KASASN clobbers more registers than covered by the emulated call implementation. Convert the int3_magic() selftest to a ASM function so the compiler cannot KASANify it. - Unbreak the build with old GCC versions and with the Gold linker by reverting the 'Move of _etext to the actual end of .text'. In both cases the build fails with 'Invalid absolute R_X86_64_32S relocation: _etext' - Initialize the context lock for init_mm, which was never an issue until the alternatives code started to use a temporary mm for patching. - Fix a build warning vs. the LOWMEM_PAGES constant where clang complains rightfully about a signed integer overflow in the shift operation by converting the operand to an ULL. - Adjust the misnamed ENDPROC() of common_spurious in the 32bit entry code" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/stacktrace: Prevent infinite loop in arch_stack_walk_user() x86/asm: Move native_write_cr0/4() out of line x86/pgtable/32: Fix LOWMEM_PAGES constant x86/alternatives: Fix int3_emulate_call() selftest stack corruption x86/entry/32: Fix ENDPROC of common_spurious Revert "x86/build: Move _etext to actual end of .text" x86/ldt: Initialize the context lock for init_mm
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@@ -59,6 +59,7 @@ typedef struct {
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#define INIT_MM_CONTEXT(mm) \
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.context = { \
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.ctx_id = 1, \
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.lock = __MUTEX_INITIALIZER(mm.context.lock), \
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}
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void leave_mm(int cpu);
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@@ -106,6 +106,6 @@ do { \
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* with only a host target support using a 32-bit type for internal
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* representation.
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*/
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#define LOWMEM_PAGES ((((2<<31) - __PAGE_OFFSET) >> PAGE_SHIFT))
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#define LOWMEM_PAGES ((((_ULL(2)<<31) - __PAGE_OFFSET) >> PAGE_SHIFT))
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#endif /* _ASM_X86_PGTABLE_32_H */
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@@ -741,6 +741,7 @@ extern void load_direct_gdt(int);
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extern void load_fixmap_gdt(int);
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extern void load_percpu_segment(int);
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extern void cpu_init(void);
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extern void cr4_init(void);
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static inline unsigned long get_debugctlmsr(void)
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{
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@@ -18,9 +18,7 @@
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*/
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extern unsigned long __force_order;
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/* Starts false and gets enabled once CPU feature detection is done. */
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DECLARE_STATIC_KEY_FALSE(cr_pinning);
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extern unsigned long cr4_pinned_bits;
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void native_write_cr0(unsigned long val);
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static inline unsigned long native_read_cr0(void)
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{
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@@ -29,24 +27,6 @@ static inline unsigned long native_read_cr0(void)
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return val;
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}
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static inline void native_write_cr0(unsigned long val)
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{
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unsigned long bits_missing = 0;
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set_register:
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asm volatile("mov %0,%%cr0": "+r" (val), "+m" (__force_order));
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if (static_branch_likely(&cr_pinning)) {
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if (unlikely((val & X86_CR0_WP) != X86_CR0_WP)) {
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bits_missing = X86_CR0_WP;
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val |= bits_missing;
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goto set_register;
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}
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/* Warn after we've set the missing bits. */
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WARN_ONCE(bits_missing, "CR0 WP bit went missing!?\n");
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}
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}
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static inline unsigned long native_read_cr2(void)
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{
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unsigned long val;
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@@ -91,24 +71,7 @@ static inline unsigned long native_read_cr4(void)
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return val;
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}
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static inline void native_write_cr4(unsigned long val)
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{
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unsigned long bits_missing = 0;
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set_register:
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asm volatile("mov %0,%%cr4": "+r" (val), "+m" (cr4_pinned_bits));
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if (static_branch_likely(&cr_pinning)) {
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if (unlikely((val & cr4_pinned_bits) != cr4_pinned_bits)) {
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bits_missing = ~val & cr4_pinned_bits;
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val |= bits_missing;
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goto set_register;
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}
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/* Warn after we've set the missing bits. */
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WARN_ONCE(bits_missing, "CR4 bits went missing: %lx!?\n",
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bits_missing);
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}
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}
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void native_write_cr4(unsigned long val);
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#ifdef CONFIG_X86_64
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static inline unsigned long native_read_cr8(void)
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