MIPS: Oceton: Update model detection code for new chips.
Several newer chips were not covered, update the code to detect them. This necessitates updating cvmx-mio-defs.h as well, because it has new and required definitions. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2939/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
David Daney
committed by
Ralf Baechle
Ralf Baechle
parent
506d24be55
commit
751c9f6849
@@ -4,7 +4,7 @@
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2008 Cavium Networks
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* Copyright (c) 2003-2010 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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@@ -24,14 +24,6 @@
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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/*
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*
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* File defining different Octeon model IDs and macros to
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* compare them.
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*
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*/
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#ifndef __OCTEON_MODEL_H__
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#define __OCTEON_MODEL_H__
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@@ -52,6 +44,8 @@
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* for internal use only, and may change without notice.
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*/
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#define OCTEON_FAMILY_MASK 0x00ffff00
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/* Flag bits in top byte */
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/* Ignores revision in model checks */
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#define OM_IGNORE_REVISION 0x01000000
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@@ -63,21 +57,48 @@
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#define OM_IGNORE_MINOR_REVISION 0x08000000
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#define OM_FLAG_MASK 0xff000000
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#define OM_MATCH_5XXX_FAMILY_MODELS 0x20000000 /* Match all cn5XXX Octeon models. */
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#define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000 /* Match all cn6XXX Octeon models. */
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/* Match all cn5XXX Octeon models. */
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#define OM_MATCH_5XXX_FAMILY_MODELS 0x20000000
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/* Match all cn6XXX Octeon models. */
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#define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000
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/*
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* CN6XXX models with new revision encoding
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*/
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#define OCTEON_CN68XX_PASS1_0 0x000d9100
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#define OCTEON_CN68XX_PASS1_1 0x000d9101
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#define OCTEON_CN68XX_PASS1_2 0x000d9102
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#define OCTEON_CN68XX_PASS2_0 0x000d9108
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#define OCTEON_CN68XX (OCTEON_CN68XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN68XX_PASS1_X (OCTEON_CN68XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN68XX_PASS2_X (OCTEON_CN68XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN68XX_PASS1 OCTEON_CN68XX_PASS1_X
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#define OCTEON_CN68XX_PASS2 OCTEON_CN68XX_PASS2_X
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#define OCTEON_CN66XX_PASS1_0 0x000d9200
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#define OCTEON_CN66XX_PASS1_2 0x000d9202
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#define OCTEON_CN66XX (OCTEON_CN66XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN66XX_PASS1_X (OCTEON_CN66XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN63XX_PASS1_0 0x000d9000
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#define OCTEON_CN63XX_PASS1_1 0x000d9001
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#define OCTEON_CN63XX_PASS1_2 0x000d9002
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#define OCTEON_CN63XX_PASS2_0 0x000d9008
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#define OCTEON_CN63XX_PASS2_1 0x000d9009
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#define OCTEON_CN63XX_PASS2_2 0x000d900a
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#define OCTEON_CN63XX (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN63XX_PASS1_X (OCTEON_CN63XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN63XX_PASS2_X (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN61XX_PASS1_0 0x000d9300
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#define OCTEON_CN61XX (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN61XX_PASS1_X (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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/*
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* CN5XXX models with new revision encoding
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*/
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@@ -90,10 +111,8 @@
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#define OCTEON_CN58XX_PASS2_3 0x000d030b
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#define OCTEON_CN58XX (OCTEON_CN58XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN58XX_PASS1_X (OCTEON_CN58XX_PASS1_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN58XX_PASS2_X (OCTEON_CN58XX_PASS2_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN58XX_PASS1_X (OCTEON_CN58XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN58XX_PASS2_X (OCTEON_CN58XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN58XX_PASS1 OCTEON_CN58XX_PASS1_X
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#define OCTEON_CN58XX_PASS2 OCTEON_CN58XX_PASS2_X
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@@ -103,10 +122,8 @@
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#define OCTEON_CN56XX_PASS2_1 0x000d0409
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#define OCTEON_CN56XX (OCTEON_CN56XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN56XX_PASS1_X (OCTEON_CN56XX_PASS1_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN56XX_PASS2_X (OCTEON_CN56XX_PASS2_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN56XX_PASS1_X (OCTEON_CN56XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN56XX_PASS2_X (OCTEON_CN56XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN56XX_PASS1 OCTEON_CN56XX_PASS1_X
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#define OCTEON_CN56XX_PASS2 OCTEON_CN56XX_PASS2_X
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@@ -125,8 +142,7 @@
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#define OCTEON_CN50XX_PASS1_0 0x000d0600
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#define OCTEON_CN50XX (OCTEON_CN50XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN50XX_PASS1_X (OCTEON_CN50XX_PASS1_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN50XX_PASS1_X (OCTEON_CN50XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN50XX_PASS1 OCTEON_CN50XX_PASS1_X
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/*
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@@ -138,10 +154,8 @@
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#define OCTEON_CN52XX_PASS2_0 0x000d0708
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#define OCTEON_CN52XX (OCTEON_CN52XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN52XX_PASS1_X (OCTEON_CN52XX_PASS1_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN52XX_PASS2_X (OCTEON_CN52XX_PASS2_0 \
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| OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN52XX_PASS1_X (OCTEON_CN52XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN52XX_PASS2_X (OCTEON_CN52XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN52XX_PASS1 OCTEON_CN52XX_PASS1_X
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#define OCTEON_CN52XX_PASS2 OCTEON_CN52XX_PASS2_X
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@@ -174,28 +188,23 @@
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#define OCTEON_CN3005_PASS1 (0x000d0210 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3005_PASS1_0 (0x000d0210 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3005_PASS1_1 (0x000d0212 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3005 (OCTEON_CN3005_PASS1 | OM_IGNORE_REVISION \
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| OM_CHECK_SUBMODEL)
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#define OCTEON_CN3005 (OCTEON_CN3005_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3010_PASS1 (0x000d0200 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3010_PASS1_0 (0x000d0200 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3010_PASS1_1 (0x000d0202 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3010 (OCTEON_CN3010_PASS1 | OM_IGNORE_REVISION \
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| OM_CHECK_SUBMODEL)
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#define OCTEON_CN3010 (OCTEON_CN3010_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3020_PASS1 (0x000d0110 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3020_PASS1_0 (0x000d0110 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3020_PASS1_1 (0x000d0112 | OM_CHECK_SUBMODEL)
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#define OCTEON_CN3020 (OCTEON_CN3020_PASS1 | OM_IGNORE_REVISION \
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| OM_CHECK_SUBMODEL)
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/* This matches the complete family of CN3xxx CPUs, and not subsequent models */
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#define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 \
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| OM_MATCH_PREVIOUS_MODELS \
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| OM_IGNORE_REVISION)
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#define OCTEON_CN3020 (OCTEON_CN3020_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)
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/*
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* This matches the complete family of CN3xxx CPUs, and not subsequent
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* models
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*/
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#define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_PREVIOUS_MODELS | OM_IGNORE_REVISION)
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#define OCTEON_CN5XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_5XXX_FAMILY_MODELS)
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#define OCTEON_CN6XXX (OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS)
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@@ -221,90 +230,55 @@
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#define OCTEON_38XX_FAMILY_MASK 0x00ffff00
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#define OCTEON_38XX_FAMILY_REV_MASK 0x00ffff0f
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#define OCTEON_38XX_MODEL_MASK 0x00ffff10
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#define OCTEON_38XX_MODEL_REV_MASK (OCTEON_38XX_FAMILY_REV_MASK \
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| OCTEON_38XX_MODEL_MASK)
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#define OCTEON_38XX_MODEL_REV_MASK (OCTEON_38XX_FAMILY_REV_MASK | OCTEON_38XX_MODEL_MASK)
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/* CN5XXX and later use different layout of bits in the revision ID field */
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#define OCTEON_58XX_FAMILY_MASK OCTEON_38XX_FAMILY_MASK
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#define OCTEON_58XX_FAMILY_REV_MASK 0x00ffff3f
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#define OCTEON_58XX_MODEL_MASK 0x00ffffc0
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#define OCTEON_58XX_MODEL_REV_MASK (OCTEON_58XX_FAMILY_REV_MASK \
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| OCTEON_58XX_MODEL_MASK)
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#define OCTEON_58XX_MODEL_MINOR_REV_MASK (OCTEON_58XX_MODEL_REV_MASK \
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& 0x00fffff8)
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#define OCTEON_58XX_MODEL_REV_MASK (OCTEON_58XX_FAMILY_REV_MASK | OCTEON_58XX_MODEL_MASK)
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#define OCTEON_58XX_MODEL_MINOR_REV_MASK (OCTEON_58XX_MODEL_REV_MASK & 0x00fffff8)
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#define OCTEON_5XXX_MODEL_MASK 0x00ff0fc0
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#define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z)))
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/* NOTE: This is for internal (to this file) use only. */
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static inline int __OCTEON_IS_MODEL_COMPILE__(uint32_t arg_model,
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uint32_t chip_model)
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{
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uint32_t rev_and_sub = OM_IGNORE_REVISION | OM_CHECK_SUBMODEL;
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if ((arg_model & OCTEON_38XX_FAMILY_MASK) < OCTEON_CN58XX_PASS1_0) {
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if (((arg_model & OM_FLAG_MASK) == rev_and_sub) &&
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__OCTEON_MATCH_MASK__(chip_model, arg_model,
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OCTEON_38XX_MODEL_MASK))
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return 1;
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if (((arg_model & OM_FLAG_MASK) == 0) &&
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__OCTEON_MATCH_MASK__(chip_model, arg_model,
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OCTEON_38XX_FAMILY_REV_MASK))
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return 1;
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if (((arg_model & OM_FLAG_MASK) == OM_IGNORE_REVISION) &&
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__OCTEON_MATCH_MASK__(chip_model, arg_model,
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OCTEON_38XX_FAMILY_MASK))
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return 1;
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if (((arg_model & OM_FLAG_MASK) == OM_CHECK_SUBMODEL) &&
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__OCTEON_MATCH_MASK__((chip_model), (arg_model),
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OCTEON_38XX_MODEL_REV_MASK))
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return 1;
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if ((arg_model & OM_MATCH_PREVIOUS_MODELS) &&
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((chip_model & OCTEON_38XX_MODEL_MASK) <
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(arg_model & OCTEON_38XX_MODEL_MASK)))
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return 1;
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} else {
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if (((arg_model & OM_FLAG_MASK) == rev_and_sub) &&
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__OCTEON_MATCH_MASK__((chip_model), (arg_model),
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OCTEON_58XX_MODEL_MASK))
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return 1;
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if (((arg_model & OM_FLAG_MASK) == 0) &&
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__OCTEON_MATCH_MASK__((chip_model), (arg_model),
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OCTEON_58XX_FAMILY_REV_MASK))
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return 1;
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if (((arg_model & OM_FLAG_MASK) == OM_IGNORE_MINOR_REVISION) &&
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__OCTEON_MATCH_MASK__((chip_model), (arg_model),
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OCTEON_58XX_MODEL_MINOR_REV_MASK))
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return 1;
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if (((arg_model & OM_FLAG_MASK) == OM_IGNORE_REVISION) &&
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__OCTEON_MATCH_MASK__((chip_model), (arg_model),
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OCTEON_58XX_FAMILY_MASK))
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return 1;
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if (((arg_model & OM_FLAG_MASK) == OM_CHECK_SUBMODEL) &&
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__OCTEON_MATCH_MASK__((chip_model), (arg_model),
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OCTEON_58XX_MODEL_REV_MASK))
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return 1;
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if (((arg_model & OM_MATCH_5XXX_FAMILY_MODELS) == OM_MATCH_5XXX_FAMILY_MODELS) &&
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((chip_model) >= OCTEON_CN58XX_PASS1_0) && ((chip_model) < OCTEON_CN63XX_PASS1_0))
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return 1;
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if (((arg_model & OM_MATCH_6XXX_FAMILY_MODELS) == OM_MATCH_6XXX_FAMILY_MODELS) &&
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((chip_model) >= OCTEON_CN63XX_PASS1_0))
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return 1;
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if ((arg_model & OM_MATCH_PREVIOUS_MODELS) &&
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((chip_model & OCTEON_58XX_MODEL_MASK) <
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(arg_model & OCTEON_58XX_MODEL_MASK)))
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return 1;
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}
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return 0;
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}
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/* forward declarations */
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static inline uint32_t cvmx_get_proc_id(void) __attribute__ ((pure));
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static inline uint64_t cvmx_read_csr(uint64_t csr_addr);
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#define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z)))
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/* NOTE: This for internal use only! */
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#define __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model) \
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((((arg_model & OCTEON_38XX_FAMILY_MASK) < OCTEON_CN58XX_PASS1_0) && ( \
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((((arg_model) & (OM_FLAG_MASK)) == (OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)) \
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&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_MODEL_MASK)) || \
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((((arg_model) & (OM_FLAG_MASK)) == 0) \
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&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_FAMILY_REV_MASK)) || \
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((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
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&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_FAMILY_MASK)) || \
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((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \
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&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_MODEL_REV_MASK)) || \
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((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
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&& (((chip_model) & OCTEON_38XX_MODEL_MASK) < ((arg_model) & OCTEON_38XX_MODEL_MASK))) \
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)) || \
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(((arg_model & OCTEON_38XX_FAMILY_MASK) >= OCTEON_CN58XX_PASS1_0) && ( \
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((((arg_model) & (OM_FLAG_MASK)) == (OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)) \
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&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MASK)) || \
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((((arg_model) & (OM_FLAG_MASK)) == 0) \
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&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_REV_MASK)) || \
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((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_MINOR_REVISION) \
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&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MINOR_REV_MASK)) || \
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((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
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&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_MASK)) || \
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((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \
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&& __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_REV_MASK)) || \
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((((arg_model) & (OM_MATCH_5XXX_FAMILY_MODELS)) == OM_MATCH_5XXX_FAMILY_MODELS) \
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&& ((chip_model) >= OCTEON_CN58XX_PASS1_0) && ((chip_model) < OCTEON_CN63XX_PASS1_0)) || \
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((((arg_model) & (OM_MATCH_6XXX_FAMILY_MODELS)) == OM_MATCH_6XXX_FAMILY_MODELS) \
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&& ((chip_model) >= OCTEON_CN63XX_PASS1_0)) || \
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((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
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&& (((chip_model) & OCTEON_58XX_MODEL_MASK) < ((arg_model) & OCTEON_58XX_MODEL_MASK))) \
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)))
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/* NOTE: This for internal use only!!!!! */
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static inline int __octeon_is_model_runtime__(uint32_t model)
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{
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@@ -312,22 +286,25 @@ static inline int __octeon_is_model_runtime__(uint32_t model)
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/*
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* Check for special case of mismarked 3005 samples. We only
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* need to check if the sub model isn't being ignored.
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* need to check if the sub model isn't being ignored
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*/
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if ((model & OM_CHECK_SUBMODEL) == OM_CHECK_SUBMODEL) {
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if (cpuid == OCTEON_CN3010_PASS1 \
|
||||
&& (cvmx_read_csr(0x80011800800007B8ull) & (1ull << 34)))
|
||||
if (cpuid == OCTEON_CN3010_PASS1 && (cvmx_read_csr(0x80011800800007B8ull) & (1ull << 34)))
|
||||
cpuid |= 0x10;
|
||||
}
|
||||
return __OCTEON_IS_MODEL_COMPILE__(model, cpuid);
|
||||
}
|
||||
|
||||
/*
|
||||
* The OCTEON_IS_MODEL macro should be used for all Octeon model
|
||||
* checking done in a program. This should be kept runtime if at all
|
||||
* possible. Any compile time (#if OCTEON_IS_MODEL) usage must be
|
||||
* condtionalized with OCTEON_IS_COMMON_BINARY() if runtime checking
|
||||
* support is required.
|
||||
* The OCTEON_IS_MODEL macro should be used for all Octeon model checking done
|
||||
* in a program.
|
||||
* This should be kept runtime if at all possible and must be conditionalized
|
||||
* with OCTEON_IS_COMMON_BINARY() if runtime checking support is required.
|
||||
*
|
||||
* Use of the macro in preprocessor directives ( #if OCTEON_IS_MODEL(...) )
|
||||
* is NOT SUPPORTED, and should be replaced with CVMX_COMPILED_FOR()
|
||||
* I.e.:
|
||||
* #if OCTEON_IS_MODEL(OCTEON_CN56XX) -> #if CVMX_COMPILED_FOR(OCTEON_CN56XX)
|
||||
*/
|
||||
#define OCTEON_IS_MODEL(x) __octeon_is_model_runtime__(x)
|
||||
#define OCTEON_IS_COMMON_BINARY() 1
|
||||
|
||||
Reference in New Issue
Block a user