lib/raid6/altivec: Add vpermxor implementation for raid6 Q syndrome
This patch uses the vpermxor instruction to optimise the raid6 Q syndrome. This instruction was made available with POWER8, ISA version 2.07. It allows for both vperm and vxor instructions to be done in a single instruction. This has been tested for correctness on a ppc64le vm with a basic RAID6 setup containing 5 drives. The performance benchmarks are from the raid6test in the /lib/raid6/test directory. These results are from an IBM Firestone machine with ppc64le architecture. The benchmark results show a 35% speed increase over the best existing algorithm for powerpc (altivec). The raid6test has also been run on a big-endian ppc64 vm to ensure it also works for big-endian architectures. Performance benchmarks: raid6: altivecx4 gen() 18773 MB/s raid6: altivecx8 gen() 19438 MB/s raid6: vpermxor4 gen() 25112 MB/s raid6: vpermxor8 gen() 26279 MB/s Signed-off-by: Matt Brown <matthew.brown.dev@gmail.com> Reviewed-by: Daniel Axtens <dja@axtens.net> [mpe: Add VPERMXOR macro so we can build with old binutils] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman

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@@ -271,6 +271,7 @@
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#define PPC_INST_TLBSRX_DOT 0x7c0006a5
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#define PPC_INST_VPMSUMW 0x10000488
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#define PPC_INST_VPMSUMD 0x100004c8
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#define PPC_INST_VPERMXOR 0x1000002d
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#define PPC_INST_XXLOR 0xf0000490
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#define PPC_INST_XXSWAPD 0xf0000250
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#define PPC_INST_XVCPSGNDP 0xf0000780
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@@ -517,6 +518,11 @@
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#define XVCPSGNDP(t, a, b) stringify_in_c(.long (PPC_INST_XVCPSGNDP | \
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VSX_XX3((t), (a), (b))))
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#define VPERMXOR(vrt, vra, vrb, vrc) \
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stringify_in_c(.long (PPC_INST_VPERMXOR | \
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___PPC_RT(vrt) | ___PPC_RA(vra) | \
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___PPC_RB(vrb) | (((vrc) & 0x1f) << 6)))
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#define PPC_NAP stringify_in_c(.long PPC_INST_NAP)
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#define PPC_SLEEP stringify_in_c(.long PPC_INST_SLEEP)
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#define PPC_WINKLE stringify_in_c(.long PPC_INST_WINKLE)
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