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h8300: Rename ctlr_out/in[bwl] to raw_read/write[bwl]

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For the sake of consistency, let rename all ctrl_out/in calls to the write/read
calls so we have the same API consistent with the other architectures hence
open the door for the increasing of the test compilation coverage.

The unsigned long coercive cast is removed because all variables are set to
the right type "void __iomem *".

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Daniel Lezcano
2015-11-08 22:55:12 +01:00
parent 97a23beb8d
commit 751605152b
6 changed files with 76 additions and 69 deletions
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8
arch/h8300/kernel/setup.c
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@@ -207,14 +207,14 @@ device_initcall(device_probe);
#define get_wait(base, addr) ({ \
int baddr; \
baddr = ((addr) / 0x200000 * 2); \
w *= (ctrl_inw((unsigned long)(base) + 2) & (3 << baddr)) + 1; \
w *= (readw((base) + 2) & (3 << baddr)) + 1; \
})
#endif
#if defined(CONFIG_CPU_H8S)
#define get_wait(base, addr) ({ \
int baddr; \
baddr = ((addr) / 0x200000 * 16); \
w *= (ctrl_inl((unsigned long)(base) + 2) & (7 << baddr)) + 1; \
w *= (readl((base) + 2) & (7 << baddr)) + 1; \
})
#endif
@@ -228,8 +228,8 @@ static __init int access_timing(void)
bsc = of_find_compatible_node(NULL, NULL, "renesas,h8300-bsc");
base = of_iomap(bsc, 0);
w = (ctrl_inb((unsigned long)base + 0) & bit)?2:1;
if (ctrl_inb((unsigned long)base + 1) & bit)
w = (readb(base + 0) & bit)?2:1;
if (readb(base + 1) & bit)
w *= get_wait(base, addr);
else
w *= 2;