crypto: mv_cesa - Add sha1 and hmac(sha1) async hash drivers
Add sha1 and hmac(sha1) async hash drivers Signed-off-by: Uri Simchoni <uri@jdland.co.il> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@@ -1,6 +1,10 @@
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#ifndef __MV_CRYPTO_H__
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#define DIGEST_INITIAL_VAL_A 0xdd00
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#define DIGEST_INITIAL_VAL_B 0xdd04
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#define DIGEST_INITIAL_VAL_C 0xdd08
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#define DIGEST_INITIAL_VAL_D 0xdd0c
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#define DIGEST_INITIAL_VAL_E 0xdd10
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#define DES_CMD_REG 0xdd58
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#define SEC_ACCEL_CMD 0xde00
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@@ -70,6 +74,10 @@ struct sec_accel_config {
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#define CFG_AES_LEN_128 (0 << 24)
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#define CFG_AES_LEN_192 (1 << 24)
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#define CFG_AES_LEN_256 (2 << 24)
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#define CFG_NOT_FRAG (0 << 30)
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#define CFG_FIRST_FRAG (1 << 30)
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#define CFG_LAST_FRAG (2 << 30)
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#define CFG_MID_FRAG (3 << 30)
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u32 enc_p;
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#define ENC_P_SRC(x) (x)
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@@ -90,7 +98,11 @@ struct sec_accel_config {
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#define MAC_SRC_TOTAL_LEN(x) ((x) << 16)
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u32 mac_digest;
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#define MAC_DIGEST_P(x) (x)
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#define MAC_FRAG_LEN(x) ((x) << 16)
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u32 mac_iv;
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#define MAC_INNER_IV_P(x) (x)
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#define MAC_OUTER_IV_P(x) ((x) << 16)
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}__attribute__ ((packed));
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/*
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* /-----------\ 0
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@@ -101,19 +113,37 @@ struct sec_accel_config {
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* | IV IN | 4 * 4
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* |-----------| 0x40 (inplace)
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* | IV BUF | 4 * 4
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* |-----------| 0x50
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* |-----------| 0x80
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* | DATA IN | 16 * x (max ->max_req_size)
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* |-----------| 0x50 (inplace operation)
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* |-----------| 0x80 (inplace operation)
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* | DATA OUT | 16 * x (max ->max_req_size)
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* \-----------/ SRAM size
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*/
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/* Hashing memory map:
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* /-----------\ 0
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* | ACCEL CFG | 4 * 8
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* |-----------| 0x20
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* | Inner IV | 5 * 4
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* |-----------| 0x34
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* | Outer IV | 5 * 4
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* |-----------| 0x48
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* | Output BUF| 5 * 4
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* |-----------| 0x80
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* | DATA IN | 64 * x (max ->max_req_size)
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* \-----------/ SRAM size
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*/
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#define SRAM_CONFIG 0x00
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#define SRAM_DATA_KEY_P 0x20
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#define SRAM_DATA_IV 0x40
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#define SRAM_DATA_IV_BUF 0x40
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#define SRAM_DATA_IN_START 0x50
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#define SRAM_DATA_OUT_START 0x50
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#define SRAM_DATA_IN_START 0x80
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#define SRAM_DATA_OUT_START 0x80
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#define SRAM_CFG_SPACE 0x50
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#define SRAM_HMAC_IV_IN 0x20
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#define SRAM_HMAC_IV_OUT 0x34
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#define SRAM_DIGEST_BUF 0x48
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#define SRAM_CFG_SPACE 0x80
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#endif
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