drm/amdgpu: simplify Raven, Raven2, and Picasso handling

Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-13 15:41:57 -05:00
parent 23ecdc6187
commit 741deade2a
16 changed files with 60 additions and 113 deletions
--- a/include/drm/amd_asic_type.h
+++ b/include/drm/amd_asic_type.h
@@ -49,7 +49,6 @@ enum amd_asic_type {
 	CHIP_VEGA12,
 	CHIP_VEGA20,
 	CHIP_RAVEN,
-	CHIP_PICASSO,
 	CHIP_LAST,
 };