Merge tag 'imx-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
It replaces the clk_register_clkdev in imx6q clock driver with DT lookup. It depends on Mike's clk-3.7 branch. * tag 'imx-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: imx6q: replace clk_register_clkdev with clock DT lookup Resolved context add/remove conflict in arch/arm/boot/dts/imx6q.dtsi
This commit is contained in:
Olof Johansson
222
Documentation/devicetree/bindings/clock/imx6q-clock.txt
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222
Documentation/devicetree/bindings/clock/imx6q-clock.txt
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* Clock bindings for Freescale i.MX6 Quad
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Required properties:
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- compatible: Should be "fsl,imx6q-ccm"
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- reg: Address and length of the register set
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- interrupts: Should contain CCM interrupt
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- #clock-cells: Should be <1>
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The clock consumer should specify the desired clock by having the clock
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ID in its "clocks" phandle cell. The following is a full list of i.MX6Q
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clocks and IDs.
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Clock ID
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---------------------------
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dummy 0
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ckil 1
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ckih 2
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osc 3
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pll2_pfd0_352m 4
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pll2_pfd1_594m 5
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pll2_pfd2_396m 6
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pll3_pfd0_720m 7
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pll3_pfd1_540m 8
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pll3_pfd2_508m 9
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pll3_pfd3_454m 10
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pll2_198m 11
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pll3_120m 12
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pll3_80m 13
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pll3_60m 14
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twd 15
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step 16
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pll1_sw 17
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periph_pre 18
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periph2_pre 19
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periph_clk2_sel 20
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periph2_clk2_sel 21
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axi_sel 22
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esai_sel 23
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asrc_sel 24
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spdif_sel 25
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gpu2d_axi 26
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gpu3d_axi 27
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gpu2d_core_sel 28
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gpu3d_core_sel 29
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gpu3d_shader_sel 30
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ipu1_sel 31
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ipu2_sel 32
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ldb_di0_sel 33
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ldb_di1_sel 34
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ipu1_di0_pre_sel 35
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ipu1_di1_pre_sel 36
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ipu2_di0_pre_sel 37
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ipu2_di1_pre_sel 38
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ipu1_di0_sel 39
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ipu1_di1_sel 40
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ipu2_di0_sel 41
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ipu2_di1_sel 42
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hsi_tx_sel 43
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pcie_axi_sel 44
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ssi1_sel 45
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ssi2_sel 46
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ssi3_sel 47
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usdhc1_sel 48
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usdhc2_sel 49
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usdhc3_sel 50
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usdhc4_sel 51
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enfc_sel 52
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emi_sel 53
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emi_slow_sel 54
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vdo_axi_sel 55
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vpu_axi_sel 56
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cko1_sel 57
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periph 58
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periph2 59
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periph_clk2 60
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periph2_clk2 61
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ipg 62
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ipg_per 63
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esai_pred 64
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esai_podf 65
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asrc_pred 66
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asrc_podf 67
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spdif_pred 68
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spdif_podf 69
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can_root 70
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ecspi_root 71
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gpu2d_core_podf 72
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gpu3d_core_podf 73
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gpu3d_shader 74
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ipu1_podf 75
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ipu2_podf 76
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ldb_di0_podf 77
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ldb_di1_podf 78
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ipu1_di0_pre 79
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ipu1_di1_pre 80
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ipu2_di0_pre 81
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ipu2_di1_pre 82
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hsi_tx_podf 83
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ssi1_pred 84
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ssi1_podf 85
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ssi2_pred 86
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ssi2_podf 87
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ssi3_pred 88
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ssi3_podf 89
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uart_serial_podf 90
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usdhc1_podf 91
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usdhc2_podf 92
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usdhc3_podf 93
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usdhc4_podf 94
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enfc_pred 95
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enfc_podf 96
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emi_podf 97
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emi_slow_podf 98
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vpu_axi_podf 99
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cko1_podf 100
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axi 101
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mmdc_ch0_axi_podf 102
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mmdc_ch1_axi_podf 103
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arm 104
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ahb 105
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apbh_dma 106
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asrc 107
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can1_ipg 108
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can1_serial 109
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can2_ipg 110
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can2_serial 111
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ecspi1 112
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ecspi2 113
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ecspi3 114
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ecspi4 115
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ecspi5 116
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enet 117
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esai 118
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gpt_ipg 119
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gpt_ipg_per 120
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gpu2d_core 121
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gpu3d_core 122
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hdmi_iahb 123
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hdmi_isfr 124
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i2c1 125
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i2c2 126
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i2c3 127
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iim 128
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enfc 129
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ipu1 130
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ipu1_di0 131
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ipu1_di1 132
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ipu2 133
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ipu2_di0 134
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ldb_di0 135
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ldb_di1 136
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ipu2_di1 137
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hsi_tx 138
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mlb 139
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mmdc_ch0_axi 140
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mmdc_ch1_axi 141
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ocram 142
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openvg_axi 143
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pcie_axi 144
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pwm1 145
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pwm2 146
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pwm3 147
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pwm4 148
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per1_bch 149
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gpmi_bch_apb 150
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gpmi_bch 151
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gpmi_io 152
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gpmi_apb 153
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sata 154
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sdma 155
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spba 156
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ssi1 157
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ssi2 158
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ssi3 159
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uart_ipg 160
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uart_serial 161
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usboh3 162
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usdhc1 163
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usdhc2 164
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usdhc3 165
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usdhc4 166
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vdo_axi 167
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vpu_axi 168
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cko1 169
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pll1_sys 170
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pll2_bus 171
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pll3_usb_otg 172
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pll4_audio 173
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pll5_video 174
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pll6_mlb 175
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pll7_usb_host 176
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pll8_enet 177
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ssi1_ipg 178
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ssi2_ipg 179
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ssi3_ipg 180
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rom 181
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usbphy1 182
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usbphy2 183
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ldb_di0_div_3_5 184
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ldb_di1_div_3_5 185
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Examples:
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clks: ccm@020c4000 {
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compatible = "fsl,imx6q-ccm";
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reg = <0x020c4000 0x4000>;
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interrupts = <0 87 0x04 0 88 0x04>;
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#clock-cells = <1>;
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clock-output-names = ...
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"uart_ipg",
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"uart_serial",
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...;
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};
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uart1: serial@02020000 {
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compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
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reg = <0x02020000 0x4000>;
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interrupts = <0 26 0x04>;
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clocks = <&clks 160>, <&clks 161>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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